Custom IC Design

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Regarding gpdk045 PDK and the SOI transistor simulation in cadence

Category: Custom IC Design

By Pasupathy KR

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updated over 10 years ago by Andrew Beckett

6 replies • 17476 views
Discussion

ADE could not see the voltage signals

Category: Custom IC Design

By Ctree

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updated over 10 years ago by Andrew Beckett

5 replies • 14034 views
Discussion

DC convergence issues with vcvs used in a bandgap circuit

Category: Custom IC Design

By uzzymoh

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updated over 10 years ago by Andrew Beckett

1 replies • 14798 views
Discussion

Found a bug of system function $fwrite in verilog A

Category: Custom IC Design

By Biasing

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updated over 10 years ago by Biasing

2 replies • 15074 views
Discussion

Transient response of an inverter

Category: Custom IC Design

By Leof

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updated over 10 years ago by Andrew Beckett

6 replies • 17366 views
Discussion

Constant Power Source

Category: Custom IC Design

By ssarkar

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updated over 10 years ago by ssarkar

2 replies • 16504 views
Discussion

CDF

Category: Custom IC Design

By syafiq

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updated over 10 years ago by analogy

3 replies • 13575 views
Discussion

Warnings during generation of layout from source

Category: Custom IC Design

By Preethi P

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updated over 10 years ago by Preethi P

3 replies • 15222 views
Discussion

tran vs. pss - reproducing results

Category: Custom IC Design

By itos

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updated over 10 years ago by itos

2 replies • 2314 views
Discussion

Custom Calculator Function with Parametric sweeps

Category: Custom IC Design

By Eugene201

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updated over 10 years ago by Eugene201

6 replies • 17041 views
Discussion

DCDC buck converter PSS/PSTB simulation for gain/phase margin check

Category: Custom IC Design

By william prince

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updated over 10 years ago by william prince

24 replies • 20065 views
Discussion

IIP3 simulation: shooting vs. hb and choosing extrapolation point

Category: Custom IC Design

By itos

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updated over 10 years ago by itos

8 replies • 18941 views
Discussion

ac and pz discrepancies

Category: Custom IC Design

By itos

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updated over 10 years ago by itos

4 replies • 14981 views
Discussion

Parasitic extraction of FinFET inverter using planner CMOS rules

Category: Custom IC Design

By skvishvakarma

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updated over 10 years ago by skvishvakarma

2 replies • 13912 views
Discussion

Transient Analyses

Category: Custom IC Design

By analogy

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updated over 10 years ago by Andrew Beckett

1 replies • 14154 views

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