• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    layout density check with Diva.

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12872 views
  • Discussion

    parasitic resistance extract minimum value

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 13165 views
  • Discussion

    Non-linear Poly-2 Resistor in CMOS 0.35um VIS(Vanguard-TSMC)

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 764 views
  • Discussion

    how to specify MAXRSD value during transient simulation

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 13125 views
  • Discussion

    nport Issue

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    3 replies • 15389 views
  • Discussion

    Spectre S-Parameter simulation

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 18670 views
  • Discussion

    How to display Object Properties on schematics?

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    3 replies • 17901 views
  • Discussion

    Exporting Hspice netlist file.

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 13365 views
  • Discussion

    LVS out of swap memory

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    2 replies • 13497 views
  • Discussion

    eye diagram simulation

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    3 replies • 15286 views
  • Discussion

    LVS error for Dummy MOS

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    4 replies • 15851 views
  • Discussion

    how to simulate with bond pad

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12939 views
  • Discussion

    Weird PAC simulation results

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    3 replies • 14046 views
  • Discussion

    Interactive AMS

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 13010 views
  • Discussion

    Obtaining Slew rate from PSS

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    2 replies • 15320 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information