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Custom IC Design

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  • Discussion

    Guidelines for the Custom IC Design Forum

    Category: Custom IC Design

    By Andrew Beckett

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    •

    started over 14 years ago

    0 replies • 31329 views
  • Discussion

    $fscanf and $fget do not work when any portion of Verilog-A file is encrypted

    Category: Custom IC Design

    By ConradJ

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    •

    started 17 minutes ago

    0 replies • 17 views
  • Discussion

    Wildcard '*' does not match any net in spectre save statement

    Category: Custom IC Design

    By msharma

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    •

    updated 1 day ago by Andrew Beckett

    3 replies • 160 views
  • Discussion

    Getting more data after MC run directly in the Results table?

    Category: Custom IC Design

    By StephanWeber

    $usertype

    •

    updated 1 day ago by Andrew Beckett

    10 replies • 553 views
  • Discussion

    ahdlvar not saved although saveahdlvars=all is set

    Category: Custom IC Design

    By StephanWeber

    $usertype

    •

    updated 1 day ago by Andrew Beckett

    1 replies • 95 views
  • Discussion

    Failing to extract parasitics from layout - capgen file is missing

    Category: Custom IC Design

    By EG202602196052

    $usertype

    •

    started 3 days ago

    0 replies • 79 views
  • Discussion

    Very Basic Wire naming question

    Category: Custom IC Design

    By HL20260227511

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    •

    updated 3 days ago by Andrew Beckett

    1 replies • 154 views
  • Discussion

    Two-Tone Harmonic Balance Noise Settings: "Relative Harmonic" and "Reference Side-Band"

    Category: Custom IC Design

    By YX202508199356

    $usertype

    •

    updated 3 days ago by Andrew Beckett

    4 replies • 558 views
  • Discussion

    get the difference between two wave forms after parametric sweep.

    Category: Custom IC Design

    By Svilen64

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    •

    updated 5 days ago by Svilen64

    5 replies • 315 views
  • Discussion

    Speeding up transient simulation of power detector with PRBS input using PSS

    Category: Custom IC Design

    By SamLM929

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    •

    updated 6 days ago by Andrew Beckett

    3 replies • 284 views
  • Discussion

    Copying design variables from cellview to ADE Explorer / Assembler: unused variable "V" from vsource cell

    Category: Custom IC Design

    By EG202602196052

    $usertype

    •

    started 6 days ago

    0 replies • 129 views
  • Discussion

    PCD is not loaded

    Category: Custom IC Design

    By Mooh

    $usertype

    •

    updated 6 days ago by Mooh

    4 replies • 296 views
  • Discussion

    New ADE feature for statistical design variable definition: Global vs local? Correlation?

    Category: Custom IC Design

    By StephanWeber

    $usertype

    •

    updated 6 days ago by StephanWeber

    2 replies • 286 views
  • Discussion

    Spectre PSS simulation for sigma-delta modulator and verilogA model

    Category: Custom IC Design

    By StephanWeber

    $usertype

    •

    updated 6 days ago by Andrew Beckett

    3 replies • 257 views
  • Discussion

    Is random sampling necessary if LHS LDS exist

    Category: Custom IC Design

    By CC202602246636

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    •

    updated 6 days ago by CC202602246636

    2 replies • 225 views
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