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Custom IC Design

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  • Discussion

    Cellview generation from VHDL code in cadence 618

    Category: Custom IC Design

    By rovin

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    updated over 3 years ago by rovin

    5 replies • 10501 views
  • Discussion

    .csv output in spectre

    Category: Custom IC Design

    By Yea Chul

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    updated over 3 years ago by HTTb

    11 replies • 12000 views
  • Discussion

    Number of Harmonics in PSS analysis to determine the maximum time step

    Category: Custom IC Design

    By RFGeek

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    updated over 3 years ago by FormerMember

    2 replies • 9698 views
  • Discussion

    maestro spectre parallel jobs reduce as total jobs neared

    Category: Custom IC Design

    By Pirate King

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    started over 3 years ago

    0 replies • 7692 views
  • Discussion

    way to set timer length in verilog-A

    Category: Custom IC Design

    By sjwprcker

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    started over 3 years ago

    0 replies • 8011 views
  • Discussion

    difference between "temp" & "tnom"

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 3 years ago by sjwprcker

    2 replies • 3335 views
  • Discussion

    Using 'm' multiplier or vector/array notation for MonteCarlo simulations

    Category: Custom IC Design

    By vpreuss

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    updated over 3 years ago by vpreuss

    2 replies • 2392 views
  • Discussion

    how to set the env hed.checks?

    Category: Custom IC Design

    By sjwprcker

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    updated over 3 years ago by sjwprcker

    2 replies • 7910 views
  • Discussion

    QRC substrate_connection -device_list option

    Category: Custom IC Design

    By RobinC

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    updated over 3 years ago by Andrew Beckett

    1 replies • 957 views
  • Discussion

    final original layout for Parasitic Aware Design Flow RAK

    Category: Custom IC Design

    By delgsy

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    updated over 3 years ago by delgsy

    2 replies • 7875 views
  • Discussion

    Results Display Window

    Category: Custom IC Design

    By shaarawy2023

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    •

    updated over 3 years ago by henker

    3 replies • 11897 views
  • Discussion

    How To achieve pulse supply voltage with four different levels of voltage

    Category: Custom IC Design

    By Omar Ghazal

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    •

    updated over 3 years ago by Omar Ghazal

    6 replies • 16820 views
  • Discussion

    Cadence Schematic - customizing DC Operating Points annotation permanently

    Category: Custom IC Design

    By firebolt

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    •

    updated over 3 years ago by firebolt

    4 replies • 4068 views
  • Discussion

    Maestro config sweep causing changes netlisting for bus "<"

    Category: Custom IC Design

    By brianbranch

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    updated over 3 years ago by brianbranch

    5 replies • 3602 views
  • Discussion

    Can I use dynamic variable names in Spectre?

    Category: Custom IC Design

    By SteveVrk

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    •

    updated over 3 years ago by SteveVrk

    2 replies • 8335 views
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