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Custom IC Design

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Latest Posts

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  • Discussion

    Blank window when trying Y vs Y or waveWave() for plotting.

    Category: Custom IC Design

    By Nodes Nodes

    •

    updated over 1 year ago by Andrew Beckett

    2 replies • 3019 views
  • Discussion

    Command line option to open checkin/checkout gui of cell

    Category: Custom IC Design

    By SimhanAnalog SimhanAnalog

    •

    updated over 1 year ago by SimhanAnalog

    1 replies • 753 views
  • Discussion

    Combining Histograms of Multiple Tests

    Category: Custom IC Design

    By HongJian HongJian

    •

    started over 1 year ago

    0 replies • 2533 views
  • Discussion

    Maestro - get instant value of net for delay measurement

    Category: Custom IC Design

    By firebolt3 firebolt3

    •

    updated over 1 year ago by firebolt3

    2 replies • 674 views
  • Discussion

    SKILL Function to Get File Path of the Top Schematic Instance

    Category: Custom IC Design

    By sgcad sgcad

    •

    updated over 1 year ago by sgcad

    8 replies • 4183 views
  • Discussion

    Generating input of schematic in cadence virtuoso using verilog.

    Category: Custom IC Design

    By AK202409055824 AK202409055824

    •

    started over 1 year ago

    0 replies • 2476 views
  • Discussion

    GminDC and Bad Pivoting Errors Detected During the DC Analysis

    Category: Custom IC Design

    By ranaya ranaya

    •

    started over 1 year ago

    0 replies • 2617 views
  • Discussion

    Text to Symbol generator (TSG) and how to convert .slib (liberty format from Synopsis)

    Category: Custom IC Design

    By Binhngo1210 Binhngo1210

    •

    updated over 1 year ago by Binhngo1210

    2 replies • 3566 views
  • Discussion

    Transient simulation missed important points.

    Category: Custom IC Design

    By JeyJey JeyJey

    •

    updated over 1 year ago by Andrew Beckett

    6 replies • 3512 views
  • Discussion

    CMOS OPAMP Design

    Category: Custom IC Design

    By JA202409027521 JA202409027521

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 2634 views
  • Discussion

    Stopping Layout XL from re-arranging windows

    Category: Custom IC Design

    By AM202408156233 AM202408156233

    •

    updated over 1 year ago by AM202408156233

    2 replies • 2856 views
  • Discussion

    One simulation with different conditions for 2 blocks.

    Category: Custom IC Design

    By JeyJey JeyJey

    •

    started over 1 year ago

    0 replies • 2396 views
  • Discussion

    reuse PSS results to run standalone Pnoise

    Category: Custom IC Design

    By SteveRFIC SteveRFIC

    •

    updated over 1 year ago by JankoK

    1 replies • 3047 views
  • Discussion

    ADE Assembler stuck after "netlisting finished"

    Category: Custom IC Design

    By AA202408226157 AA202408226157

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 883 views
  • Discussion

    refresh of results in a runplan

    Category: Custom IC Design

    By AhmedG AhmedG

    •

    updated over 1 year ago by AhmedG

    4 replies • 3275 views
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