Custom IC Design

Latest Posts

Discussion

Guidelines for the Custom IC Design Forum

Category: Custom IC Design

By Andrew Beckett
•
started over 14 years ago

0 replies • 27940 views
Discussion

Cannot obtain the license for spectreRF when interfacing matlab with spectre

Category: Custom IC Design

By SW202509035411
•
updated 7 hours ago by Andrew Beckett

1 replies • 65 views
Discussion

Could not find netlist procedure:SpectreFNPairs instance

Category: Custom IC Design

By ranaya
•
updated 10 hours ago by Andrew Beckett

5 replies • 344 views
Discussion

LUT implementation using VerilogA code In Cadence Virtuoso

Category: Custom IC Design

By ZulfiqarKiani
•
started 14 hours ago

0 replies • 67 views
Discussion

Sorting variables by name alphanumerically in Virtuoso ADE Assembler / maestro

Category: Custom IC Design

By Dominique8765
•
updated 1 day ago by Andrew Beckett

1 replies • 95 views
Discussion

sweeping transistor number of fingers in a simulation

Category: Custom IC Design

By TommasoF
•
updated 1 day ago by TommasoF

2 replies • 487 views
Discussion

Quantus QRC issue

Category: Custom IC Design

By HY20250821344
•
updated 1 day ago by Andrew Beckett

1 replies • 130 views
Discussion

PVS LVS not flagging device W/L mismatches in gpdk045 (IC23.1 / PVS 23.11)

Category: Custom IC Design

By RK202509013321
•
updated 2 days ago by Andrew Beckett

4 replies • 205 views
Discussion

xrun: *F,SROOTE: Cannot find the Spectre installation

Category: Custom IC Design

By Leo 93
•
updated 3 days ago by Andrew Beckett

3 replies • 259 views
Discussion

use DC sweep variable to set another variable

Category: Custom IC Design

By Darrell L
•
updated 3 days ago by Darrell L

2 replies • 249 views
Discussion

automate cadence design to avoid time consuming steps for simulation using python subprocess module.

Category: Custom IC Design

By AP202507218251
•
started 3 days ago

0 replies • 98 views
Discussion

ERROR (NVN-13010): Cell rupolym is not defined while running Pegasus LVS

Category: Custom IC Design

By yogeshjaiswalCAD
•
updated 4 days ago by Andrew Beckett

3 replies • 227 views
Discussion

All pins on schematics unconnected to their attached wires when importing EDIF from Siemens,

Category: Custom IC Design

By DavidGogiber
•
updated 5 days ago by Andrew Beckett

4 replies • 557 views
Discussion

Cannot Copy Variable to Other Tests

Category: Custom IC Design

By MM202507017815
•
updated 7 days ago by Andrew Beckett

1 replies • 203 views
Discussion

Cadence PEX Directory Creation - Unable to Create the Directory for Netlist

Category: Custom IC Design

By ranaya
•
updated 10 days ago by ranaya

2 replies • 299 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.