Custom IC Design

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verilogA

Category: Custom IC Design

By abdurrahman0234

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updated over 3 years ago by Andrew Beckett

1 replies • 9340 views
Discussion

InstallScape - failed to install component: cdsPython

Category: Custom IC Design

By bernardoleite

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updated over 3 years ago by bernardoleite

5 replies • 3414 views
Discussion

Cannot select signals to be saved in ADE Explorer/Assembler; net listing is incorrect etc.

Category: Custom IC Design

By SteveVrk

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updated over 3 years ago by FormerMember

9 replies • 5864 views
Discussion

VerilogA module instance parameter override weird behavior

Category: Custom IC Design

By AAbdelRahman

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updated over 3 years ago by AAbdelRahman

7 replies • 13364 views
Discussion

Thermal noise modeling

Category: Custom IC Design

By mahdiee86

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updated over 3 years ago by Andrew Beckett

5 replies • 12694 views
Discussion

Assembler-4040 Failed to fetch results from Matlab script

Category: Custom IC Design

By Brad RFeng

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updated over 3 years ago by Andrew Beckett

1 replies • 9176 views
Discussion

Maestro file become very large

Category: Custom IC Design

By delgsy

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updated over 3 years ago by delgsy

2 replies • 9879 views
Discussion

Multipart Path Dependent Separation and Multiple Master Paths

Category: Custom IC Design

By Kevin Buck

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updated over 3 years ago by Kevin Buck

4 replies • 10629 views
Discussion

5 Terminal MOSFET to exploit the Bipolar Operation of MOSFET

Category: Custom IC Design

By Zahid1234

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updated over 3 years ago by Andrew Beckett

1 replies • 10108 views
Discussion

Verilog-A Parser shows an error but simulation runs successfully with 0 errors

Category: Custom IC Design

By ElZorro

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updated over 3 years ago by ElZorro

2 replies • 12216 views
Discussion

Conditional netlisting of instance depending on CDF parameter value

Category: Custom IC Design

By JackCadnece

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updated over 3 years ago by JackCadnece

2 replies • 9906 views
Discussion

Liberate - Constraint search failed

Category: Custom IC Design

By iamKarthikBK

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updated over 3 years ago by iamKarthikBK

4 replies • 2377 views
Discussion

How to query the Assembler results database for an evaluated expression?

Category: Custom IC Design

By Brad RFeng

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updated over 3 years ago by Andrew Beckett

5 replies • 11192 views
Discussion

user defined parameter in dynamic parameter transient simulation

Category: Custom IC Design

By GirishW

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updated over 3 years ago by GirishW

2 replies • 12662 views
Discussion

Moving average offset in verilogA

Category: Custom IC Design

By jorgevdelacruzN

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updated over 3 years ago by slim15

2 replies • 13703 views

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