Custom IC Design

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probe tcl command with time_window option

Category: Custom IC Design

By apogee

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updated over 5 years ago by apogee

2 replies • 16940 views
Discussion

DC SWEEP COMPONENT VARIABLE

Category: Custom IC Design

By joaopaulo

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updated over 5 years ago by joaopaulo

2 replies • 14180 views
Discussion

Is there a setting to let multiple runs of transient noise run in parallel

Category: Custom IC Design

By ExcaIibur

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updated over 5 years ago by ExcaIibur

2 replies • 16204 views
Discussion

skill command to get the current library name

Category: Custom IC Design

By Meny Lea

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updated over 5 years ago by Andrew Beckett

5 replies • 17096 views
Discussion

rfTlineLib sbend

Category: Custom IC Design

By dzakharian

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updated over 5 years ago by Andrew Beckett

1 replies • 12947 views
Discussion

Output expressions containing variables and parameters not executed when using ADE XL

Category: Custom IC Design

By Chevelle70

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updated over 5 years ago by Andrew Beckett

6 replies • 21937 views
Discussion

Mark Net in Virtuoso-L

Category: Custom IC Design

By threepwood06

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updated over 5 years ago by threepwood06

11 replies • 22336 views
Discussion

VMT

Category: Custom IC Design

By sidm

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updated over 5 years ago by Andrew Beckett

5 replies • 13845 views
Discussion

What is the range and type of number that spectre m factor can legally take?

Category: Custom IC Design

By LDIL

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updated over 5 years ago by Andrew Beckett

1 replies • 12982 views
Discussion

Stability analysis Phase margin and loop gain

Category: Custom IC Design

By RakeshPRG

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updated over 5 years ago by RakeshPRG

4 replies • 26969 views
Discussion

Choosing XF Magnitude of supply when measuring supply noise

Category: Custom IC Design

By david73

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updated over 5 years ago by david73

2 replies • 14828 views
Discussion

Is there a simple way of converting a schematic to an s-parameter model?

Category: Custom IC Design

By MatthewLove

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updated over 5 years ago by MatthewLove

2 replies • 13522 views
Discussion

Simulating IBIS Model using Spectre

Category: Custom IC Design

By cADEUser

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updated over 5 years ago by Andrew Beckett

6 replies • 18037 views
Discussion

Delay Degradation vs Glitch Peak Criteria for Constraint Measurement in Cadence Liberate

Category: Custom IC Design

By anurans

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updated over 5 years ago by Guangjun Cao

5 replies • 14967 views
Discussion

ERROR (OSSGLD-18): and not able to run simulation

Category: Custom IC Design

By cADEUser

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updated over 5 years ago by cADEUser

10 replies • 17759 views

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