• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    inheriting minimum of 2 parent parameters

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 12886 views
  • Discussion

    Handling globals and inherited connections in LVS.

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 16705 views
  • Discussion

    add new layer

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 13279 views
  • Discussion

    Looking for Toby Schaffer

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12485 views
  • Discussion

    Looking for Toby Schaffer

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12565 views
  • Discussion

    Introducing your forum moderators

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12957 views
  • Discussion

    To add Assura Physical Layout Verification tool to Virtuso

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    4 replies • 16316 views
  • Discussion

    Posting Code to the forum

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12560 views
  • Discussion

    LVS issues for new device model

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12584 views
  • Discussion

    Connect two nodes with different names

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 21580 views
  • Discussion

    IBIS modeling with Virtuoso ver6.1.1

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 13714 views
  • Discussion

    Long term jitter from SpectreRF's Phase noise?

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 4128 views
  • Discussion

    a few AHDL and Tool questions

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    6 replies • 15611 views
  • Discussion

    modeling spiral inductors

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    4 replies • 16483 views
  • Discussion

    switched cap and PSS/PAC analysis

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 3036 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information