Custom IC Design

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about cadence virtuoso guidance manual problem

Category: Custom IC Design

By JJ202503031042

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updated 4 months ago by JJ202503031042

3 replies • 1803 views
Discussion

Creating Assura DRC rule to check that sep of 2 layers is exactly 2 different values

Category: Custom IC Design

By Miguel V

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started 4 months ago

0 replies • 1131 views
Discussion

LVS Warning: “Unattached port label” for PLUS/MINUS on layer ind11_text — can’t locate device

Category: Custom IC Design

By RK202509013321

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updated 4 months ago by RobMan

3 replies • 1371 views
Discussion

Dual Core Oscillator Open Loop

Category: Custom IC Design

By IS20250922772

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started 4 months ago

0 replies • 1044 views
Discussion

Assembler: possible to disable automatic evaluation of output expressions?

Category: Custom IC Design

By dontpanic

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updated 4 months ago by Andrew Beckett

1 replies • 1289 views
Discussion

Assembler: possible to force inclusion of model file(s) at the very beginning of netlist?

Category: Custom IC Design

By dontpanic

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updated 4 months ago by Andrew Beckett

3 replies • 962 views
Discussion

Interactive mode for Spectre using Python/TCL

Category: Custom IC Design

By CB202409064221

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updated 4 months ago by Andrew Beckett

1 replies • 528 views
Discussion

PAC is giving 0V at the output

Category: Custom IC Design

By SA202512302438

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updated 4 months ago by Frank Wiedmann

2 replies • 1440 views
Discussion

Replace symbol pin names without changing the pin placement and symbol boundary

Category: Custom IC Design

By SimhanAnalog

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updated 4 months ago by SimhanAnalog

4 replies • 2160 views
Discussion

Which simulation tools are supported for Voltus-XFi within Virtuoso environment?

Category: Custom IC Design

By JY202510312553

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started 4 months ago

0 replies • 1095 views
Discussion

TSMC PDK Inductor Finder

Category: Custom IC Design

By nqthang

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started 4 months ago

0 replies • 1424 views
Discussion

Fundamental question on edge phase noise from sampled PNOISE

Category: Custom IC Design

By Yuto Lau

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updated 4 months ago by Yuto Lau

6 replies • 2058 views
Discussion

PWM block gain simulation using pss

Category: Custom IC Design

By TH202510293247

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started 4 months ago

0 replies • 960 views
Discussion

Cadence Virtuoso IC6.1.8 - Layout GXL Automatic Placement

Category: Custom IC Design

By hoangtn3702

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started 4 months ago

0 replies • 354 views
Discussion

wait a long time to have results updated

Category: Custom IC Design

By sjwprcssw

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started 4 months ago

0 replies • 1123 views

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