Custom IC Design

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How generate spectre netlist with model parameters

Category: Custom IC Design

By TiNat

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updated over 15 years ago by Andrew Beckett

1 replies • 5561 views
Discussion

Unable to export CDL file

Category: Custom IC Design

By Renee

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updated over 15 years ago by Renee

2 replies • 17774 views
Discussion

ADEXL Default Job Policy Error

Category: Custom IC Design

By jorankin

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updated over 15 years ago by jorankin

2 replies • 17268 views
Discussion

****ERROR****: Unmatched double quote for string:

Category: Custom IC Design

By Romay

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updated over 15 years ago by aplumb

4 replies • 15730 views
Discussion

Default settings for ADEXL and OCEANXL

Category: Custom IC Design

By jorankin

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updated over 15 years ago by Andrew Beckett

1 replies • 14485 views
Discussion

Cadence IC613: Problem in importing GDS2 file

Category: Custom IC Design

By iamlearning

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updated over 15 years ago by iamlearning

17 replies • 21063 views
Discussion

*WARNING* Cut layer of viaDef 'M1_OD' should be of function 'cut', 'li' or 'passivationCut'.

Category: Custom IC Design

By shushan

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updated over 15 years ago by Andrew Beckett

7 replies • 8455 views
Discussion

Putting object on grid

Category: Custom IC Design

By frogconsultant

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updated over 15 years ago by Andrew Beckett

1 replies • 13957 views
Discussion

How to activate Mark Net utility in virtuoso IC6.1.3.500.18 version?

Category: Custom IC Design

By shushan

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updated over 15 years ago by shushan

2 replies • 13937 views
Discussion

Input File to set Input Voltages

Category: Custom IC Design

By StreamCX

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updated over 15 years ago by StreamCX

2 replies • 6748 views
Discussion

How to add a flicker noise source to a component ?

Category: Custom IC Design

By wighou

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updated over 15 years ago by Andrew Beckett

5 replies • 19320 views
Discussion

How to build a standard cell model (for a printed transistor) in Cadence

Category: Custom IC Design

By write2rammy

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updated over 15 years ago by Andrew Beckett

11 replies • 19323 views
Discussion

Multipart path

Category: Custom IC Design

By frogconsultant

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updated over 15 years ago by Andrew Beckett

6 replies • 19259 views
Discussion

How to build a filter with its file-based characteristics

Category: Custom IC Design

By 800228

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updated over 15 years ago by 800228

4 replies • 17295 views
Discussion

how to set the tech purpose of 0 in an ASCII technolog file

Category: Custom IC Design

By phenixgj

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updated over 15 years ago by Andrew Beckett

1 replies • 13564 views

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Custom IC Design

Latest Posts

How generate spectre netlist with model parameters

Unable to export CDL file

ADEXL Default Job Policy Error

ERROR: Unmatched double quote for string:

Default settings for ADEXL and OCEANXL

Cadence IC613: Problem in importing GDS2 file

WARNING Cut layer of viaDef 'M1_OD' should be of function 'cut', 'li' or 'passivationCut'.

Putting object on grid

How to activate Mark Net utility in virtuoso IC6.1.3.500.18 version?

Input File to set Input Voltages

How to add a flicker noise source to a component ?

How to build a standard cell model (for a printed transistor) in Cadence

Multipart path

How to build a filter with its file-based characteristics

how to set the tech purpose of 0 in an ASCII technolog file

Community Guidelines