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Custom IC Design

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  • Discussion

    cdl export error when lvs with dracula

    Category: Custom IC Design

    By yogeshjaiswalCAD yogeshjaiswalCAD

    •

    updated 6 months ago by yogeshjaiswalCAD

    7 replies • 2296 views
  • Discussion

    Can't find documentation on Spectre warnings SFE-83 and SFE-47

    Category: Custom IC Design

    By mikewu999 mikewu999

    •

    updated 6 months ago by Andrew Beckett

    5 replies • 796 views
  • Discussion

    Monte Carlo Voltage Source

    Category: Custom IC Design

    By JO202503011751 JO202503011751

    •

    updated 6 months ago by JO202503011751

    4 replies • 1855 views
  • Discussion

    can I have a if statement for the config

    Category: Custom IC Design

    By Mooh Mooh

    •

    updated 6 months ago by Andrew Beckett

    3 replies • 1639 views
  • Discussion

    Can't display the result of Jee

    Category: Custom IC Design

    By littleneil littleneil

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 328 views
  • Discussion

    Spectre simulation ERROR, convergence issue

    Category: Custom IC Design

    By SM202501097919 SM202501097919

    •

    updated 6 months ago by Andrew Beckett

    3 replies • 2815 views
  • Discussion

    HBSP simulation of Gilbert Cell Mixer

    Category: Custom IC Design

    By HuyDo HuyDo

    •

    started 6 months ago

    0 replies • 1437 views
  • Discussion

    How do I select data set for Explorer->Direct Plot ?

    Category: Custom IC Design

    By BillH314 BillH314

    •

    updated 6 months ago by BillH314

    2 replies • 393 views
  • Discussion

    Unbound Variable 'red' in ASCII Technology File

    Category: Custom IC Design

    By JJ202502261359 JJ202502261359

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 393 views
  • Discussion

    Issue Adding New Layers to Tech ASCII File in Virtuoso 6.1.7

    Category: Custom IC Design

    By JJ202502261359 JJ202502261359

    •

    updated 6 months ago by JJ202502261359

    2 replies • 1645 views
  • Discussion

    ERROR (VACOMP-1070): Internal Compiling Error

    Category: Custom IC Design

    By USAAWA USAAWA

    •

    updated 6 months ago by USAAWA

    2 replies • 1685 views
  • Discussion

    iPar error when used in CDF

    Category: Custom IC Design

    By JS20250120924 JS20250120924

    •

    updated 6 months ago by JS20250120924

    4 replies • 1991 views
  • Discussion

    Verilog AMS simulation error

    Category: Custom IC Design

    By MS202502248626 MS202502248626

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 1594 views
  • Discussion

    Virtuoso Hierarchy Editor unable to find primitive resistor/capacitor/inductor

    Category: Custom IC Design

    By Nett Nett

    •

    updated 6 months ago by Andrew Beckett

    3 replies • 878 views
  • Discussion

    transfer off maestro results history

    Category: Custom IC Design

    By VAIBHAV VAIBHAV

    •

    started 6 months ago

    0 replies • 1364 views
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