Custom IC Design

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Discussion

dose anyone know how to solve this problem???

Category: Custom IC Design

By Jay12

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updated over 15 years ago by Andrew Beckett

1 replies • 13000 views
Discussion

custum mdl functions in assertions

Category: Custom IC Design

By MarkSummers

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updated over 15 years ago by Andrew Beckett

1 replies • 13128 views
Discussion

Anyone used EQN(..) in Virtuoso-ADE->Setup Outputs?

Category: Custom IC Design

By swdesigner

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updated over 15 years ago by Andrew Beckett

2 replies • 704 views
Discussion

Techgen + RCXdspfINIT

Category: Custom IC Design

By Slawa

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updated over 15 years ago by Quek

9 replies • 9294 views
Discussion

Failed to get MPS handle

Category: Custom IC Design

By Nabavi

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updated over 15 years ago by Nabavi

4 replies • 16261 views
Discussion

tran simulation shows bad result with nport, while AC is ok

Category: Custom IC Design

By TobiasM

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updated over 15 years ago by Andrew Beckett

1 replies • 14747 views
Discussion

using nport in Verilog-AMS

Category: Custom IC Design

By TobiasM

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updated over 15 years ago by TobiasM

4 replies • 15003 views
Discussion

QRC + command file

Category: Custom IC Design

By Slawa

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updated over 15 years ago by Quek

9 replies • 18585 views
Discussion

ADE XL: Problems using ocean script results after parametric analysis...

Category: Custom IC Design

By lperktold

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started over 15 years ago

0 replies • 13469 views
Discussion

selecting a particular iteration result for transient Monte Carlo sim in Ocean

Category: Custom IC Design

By mazinga

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started over 15 years ago

0 replies • 13259 views
Discussion

Cadence5, output pane, subtraction of two signals

Category: Custom IC Design

By StreamCX

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updated over 15 years ago by Andrew Beckett

3 replies • 11885 views
Discussion

Transient simulation with noise

Category: Custom IC Design

By archive

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updated over 15 years ago by Tawna

1 replies • 13132 views
Discussion

leHiCreateContact() not working

Category: Custom IC Design

By badry

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updated over 15 years ago by badry

4 replies • 13820 views
Discussion

cadence ic613 with assura32: warning about environment variable

Category: Custom IC Design

By iamlearning

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updated over 15 years ago by Quek

16 replies • 19360 views
Discussion

How to create templates for vdd/vss nets in Virtuoso

Category: Custom IC Design

By akbhide

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updated over 15 years ago by Andrew Beckett

4 replies • 4675 views

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