• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    run multiple stb sim at the same time

    Category: Custom IC Design

    By sjwprcker

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 10442 views
  • Discussion

    problem about hidding schematic in virtuoso

    Category: Custom IC Design

    By ppptt

    $usertype

    •

    updated over 3 years ago by FormerMember

    1 replies • 9154 views
  • Discussion

    Cell copy problem with layout view in Cadence Virtuoso

    Category: Custom IC Design

    By Senan

    $usertype

    •

    started over 3 years ago

    0 replies • 9010 views
  • Discussion

    How to use calculator in ADE Explorer

    Category: Custom IC Design

    By SpiceMonkey

    $usertype

    •

    updated over 3 years ago by SpiceMonkey

    2 replies • 14235 views
  • Discussion

    LVS complaining about lower level hierarchal design

    Category: Custom IC Design

    By Senan

    $usertype

    •

    started over 3 years ago

    0 replies • 8759 views
  • Discussion

    PVS requires pin Label to pass the LVS

    Category: Custom IC Design

    By Senan

    $usertype

    •

    updated over 3 years ago by Senan

    2 replies • 10450 views
  • Discussion

    PDK automation system

    Category: Custom IC Design

    By hustyzw

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 9882 views
  • Discussion

    ADE Explorer Checks/Asserts Skip Device Inside Subckt is giving an error

    Category: Custom IC Design

    By Nader Fathy

    $usertype

    •

    updated over 3 years ago by Nader Fathy

    3 replies • 3889 views
  • Discussion

    Using sampled pxf analysis to simulate deterministic jitter

    Category: Custom IC Design

    By Frank Wiedmann

    $usertype

    •

    started over 3 years ago

    0 replies • 10406 views
  • Discussion

    via array justification?

    Category: Custom IC Design

    By kenc184

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    3 replies • 10213 views
  • Discussion

    probing internal bus

    Category: Custom IC Design

    By delgsy

    $usertype

    •

    updated over 3 years ago by FormerMember

    3 replies • 12864 views
  • Discussion

    Incomplete DRC Results

    Category: Custom IC Design

    By Kevin Buck

    $usertype

    •

    started over 3 years ago

    0 replies • 9345 views
  • Discussion

    Clipping layer in Layout

    Category: Custom IC Design

    By MichR

    $usertype

    •

    updated over 3 years ago by MichR

    2 replies • 10519 views
  • Discussion

    Variables in the SPEC section of Cadence Explorer

    Category: Custom IC Design

    By mhkvy4

    $usertype

    •

    updated over 3 years ago by mhkvy4

    4 replies • 13023 views
  • Discussion

    ADE Explorer - Extracted DSPF Netlist - Probing Transient Current

    Category: Custom IC Design

    By life

    $usertype

    •

    updated over 3 years ago by FormerMember

    1 replies • 3866 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information