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Custom IC Design

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  • Discussion

    Does anyone know where I can find info on the TSMC18rf (180nm) PDK?

    Category: Custom IC Design

    By TheCoffeeLovingStudent TheCoffeeLovingStudent

    •

    updated 10 months ago by TheCoffeeLovingStudent

    4 replies • 4323 views
  • Discussion

    Current mirror sizing limited trans. length

    Category: Custom IC Design

    By JeyJey JeyJey

    •

    started 10 months ago

    0 replies • 2278 views
  • Discussion

    Saving maestro Changes After Opening in Read-Only Mode

    Category: Custom IC Design

    By KTBuckON KTBuckON

    •

    updated 10 months ago by KTBuckON

    2 replies • 2549 views
  • Discussion

    Importing PSPICE .lib file into Virtuoso

    Category: Custom IC Design

    By IP202410071719 IP202410071719

    •

    updated 10 months ago by IP202410071719

    2 replies • 3622 views
  • Discussion

    use cadence liberate to characterize a cell that has capacitance and resistance,but failed...

    Category: Custom IC Design

    By TH20240830782 TH20240830782

    •

    updated 10 months ago by TH20240830782

    2 replies • 1125 views
  • Discussion

    regarding simulating a verilogams file in cadence for implementing mtj

    Category: Custom IC Design

    By JJ202409288946 JJ202409288946

    •

    updated 11 months ago by JJ202409288946

    2 replies • 2979 views
  • Discussion

    Virtuoso_'Analog_Design_Environment_L', 'Analog_Design_Environment_XL', and 'Analog_Design_Environment_L' License Checkout Failure IC 6.1.8

    Category: Custom IC Design

    By SA202410022720 SA202410022720

    •

    updated 11 months ago by Andrew Beckett

    1 replies • 583 views
  • Discussion

    Select Multiple Traces by Corner in ViVa

    Category: Custom IC Design

    By KTBuckON KTBuckON

    •

    updated 11 months ago by KTBuckON

    2 replies • 2812 views
  • Discussion

    Feed results of AC analysis back to TRAN analysis (Spectre)

    Category: Custom IC Design

    By mikewu999 mikewu999

    •

    started 11 months ago

    0 replies • 2356 views
  • Discussion

    Warning (CMI-2477) Rds is less then 0.001 gpdk90nm

    Category: Custom IC Design

    By AL202409293035 AL202409293035

    •

    updated 11 months ago by AL202409293035

    2 replies • 3052 views
  • Discussion

    Exporting GDS with groups intact layout

    Category: Custom IC Design

    By gkasap92 gkasap92

    •

    updated 11 months ago by Andrew Beckett

    1 replies • 2647 views
  • Discussion

    Regarding Code to Generate Analog Matching Set Pattern

    Category: Custom IC Design

    By NG202409204827 NG202409204827

    •

    updated 11 months ago by Andrew Beckett

    3 replies • 2849 views
  • Discussion

    Combine only selected analog traces instead of all analog traces

    Category: Custom IC Design

    By HYKen HYKen

    •

    updated 11 months ago by Andrew Beckett

    1 replies • 2402 views
  • Discussion

    stb Results Documentation

    Category: Custom IC Design

    By Analog Pete Analog Pete

    •

    updated 11 months ago by Andrew Beckett

    1 replies • 2769 views
  • Discussion

    modgen issue (layout flipping horizontally/vertically)

    Category: Custom IC Design

    By supriyo1985 supriyo1985

    •

    started 11 months ago

    0 replies • 469 views
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