Custom IC Design

Latest Posts

Discussion

problem with lvs in calibre

Category: Custom IC Design

By salar1991

$usertype
•
updated over 7 years ago by salar1991

4 replies • 16362 views
Discussion

saveNetlist option changing view to functional from schematic- Innovus to Calibre

Category: Custom IC Design

By kash022

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 4303 views
Discussion

Back Annotation of Segmented Resistors

Category: Custom IC Design

By snee

$usertype
•
updated over 7 years ago by Andrew Beckett

1 replies • 13630 views
Discussion

dynamic parameter in SpectreMDL

Category: Custom IC Design

By aarthymani

$usertype
•
updated over 7 years ago by aarthymani

3 replies • 15237 views
Discussion

Verilog-A import variables from file

Category: Custom IC Design

By HoWei

$usertype
•
updated over 7 years ago by Andrew Beckett

5 replies • 17890 views
Discussion

FILL* on schematic unbound LVS error

Category: Custom IC Design

By Anklon

$usertype
•
updated over 7 years ago by Andrew Beckett

1 replies • 14198 views
Discussion

How could I assign IO type during " Create Pins from Labels" option

Category: Custom IC Design

By Anklon

$usertype
•
updated over 7 years ago by Andrew Beckett

1 replies • 1874 views
Discussion

leHiCreateVia

Category: Custom IC Design

By Ash16

$usertype
•
updated over 7 years ago by Ash16

2 replies • 13576 views
Discussion

AMS not running in cadence OA

Category: Custom IC Design

By DanielHsieh

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 15503 views
Discussion

Syntax for device checks associated to just one type of simulation

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 7 years ago by FormerMember

4 replies • 2478 views
Discussion

Converting Waveform data to list or vector using ocean Script

Category: Custom IC Design

By Ishant Anand

$usertype
•
updated over 7 years ago by Ishant Anand

6 replies • 17823 views
Discussion

MonteCarlo simulation is taking much longer time than expected

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 7 years ago by RFStuff

14 replies • 20958 views
Discussion

VerilogA model Monte Carlo Simulation - Histogram Curve

Category: Custom IC Design

By vijaykpd

$usertype
•
updated over 7 years ago by vijaykpd

8 replies • 4068 views
Discussion

more pin name and net name checking at check and save

Category: Custom IC Design

By enzhu

$usertype
•
updated over 7 years ago by enzhu

3 replies • 14010 views
Discussion

error in checking lvs test with calibre tool

Category: Custom IC Design

By salar1991

$usertype
•
updated over 7 years ago by salar1991

2 replies • 17050 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.