Custom IC Design

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Discussion

Environment variable to prevent "stream in translation complete" pop up dialogue after streamout and streamin

Category: Custom IC Design

By blankman

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updated over 8 years ago by blankman

2 replies • 1182 views
Discussion

How to plot transistor's parameters evolution over time with transient simulation

Category: Custom IC Design

By Edouard R

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updated over 8 years ago by Edouard R

3 replies • 5452 views
Discussion

PEX Compilation Error

Category: Custom IC Design

By mehdina94rm

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updated over 8 years ago by marten

2 replies • 15763 views
Discussion

How to fix warning from Spectre about a missing bulk-source and bulk-drain diode?

Category: Custom IC Design

By Bean Nakamura

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updated over 8 years ago by taraRF

3 replies • 15736 views
Discussion

installation issue in Installscape through DVD

Category: Custom IC Design

By conrel

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updated over 8 years ago by Andrew Beckett

1 replies • 14042 views
Discussion

" *Error* asiGetDesignLibName: no applicable method for the class - list" during parametric simulation in ADE

Category: Custom IC Design

By yayla

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updated over 8 years ago by Andrew Beckett

6 replies • 5639 views
Discussion

Convergence difficulties in Verilog A while using equivalent differential equation instead of laplace_nd function

Category: Custom IC Design

By Quilon

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updated over 8 years ago by Andrew Beckett

3 replies • 15649 views
Discussion

Virtuoso Layout XL/GXL -- rasterizing an anyAngle polygon onto a grid

Category: Custom IC Design

By jack.holloway

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updated over 8 years ago by MarkRuiter

2 replies • 3053 views
Discussion

CDS_thru, LVS, new layer

Category: Custom IC Design

By samer1

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updated over 8 years ago by samer1

3 replies • 15062 views
Discussion

varying inline subckt parameter with altergroup in Spectre

Category: Custom IC Design

By sunilm123

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updated over 8 years ago by Andrew Beckett

1 replies • 15166 views
Discussion

$system() command in Verilog-A

Category: Custom IC Design

By farhan89

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updated over 8 years ago by Andrew Beckett

1 replies • 14441 views
Discussion

PDK menu not showing in CIW

Category: Custom IC Design

By wgtkan

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updated over 8 years ago by Andrew Beckett

1 replies • 15022 views
Discussion

ADE simulation setup toolbar missing buttons

Category: Custom IC Design

By wgtkan

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updated over 8 years ago by Andrew Beckett

3 replies • 15274 views
Discussion

How to creat a uniform distribution in source file for Monte-Carlo simulation?

Category: Custom IC Design

By UUinfini

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updated over 8 years ago by lartola

8 replies • 19356 views
Discussion

Plotting Gm vs Vgs for different values of Vbs

Category: Custom IC Design

By wgtkan

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updated over 8 years ago by fatcat1206

4 replies • 24712 views

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