Custom IC Design

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Discussion

Loading Default setting in cds initalization

Category: Custom IC Design

By wgtkan

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updated over 8 years ago by Quek

1 replies • 13997 views
Discussion

Layout Make readonly/Review Request

Category: Custom IC Design

By JackPro

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updated over 8 years ago by Quek

1 replies • 957 views
Discussion

can AEL(analog Expression Language) evaluate strings?

Category: Custom IC Design

By karis86

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started over 8 years ago

0 replies • 1026 views
Discussion

Regarding accumulated long term jitter sim using PSS/PNOISE

Category: Custom IC Design

By SomanP

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started over 8 years ago

0 replies • 1334 views
Discussion

Create VIA form disappears

Category: Custom IC Design

By RaghavasimhanT

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updated over 8 years ago by Andrew Beckett

2 replies • 15137 views
Discussion

Custom colors for waveform viewer and net selection in Virtuoso

Category: Custom IC Design

By Aldo2

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updated over 8 years ago by Frank Wiedmann

1 replies • 13479 views
Discussion

How to know the most critical node that set my minimum transient time step ?

Category: Custom IC Design

By Johanny Saenz

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updated over 8 years ago by Frank Wiedmann

1 replies • 13268 views
Discussion

Extracted Netlist Simulation Speedup?

Category: Custom IC Design

By MMueller

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updated over 8 years ago by Andrew Beckett

2 replies • 13894 views
Discussion

VHDL-AMS simulation issue

Category: Custom IC Design

By srana01

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started over 8 years ago

0 replies • 15111 views
Discussion

ADE/Spectre Name Mapping with Extracted Views

Category: Custom IC Design

By BrJaWr

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started over 8 years ago

0 replies • 649 views
Discussion

xmax and xmin are returning nil

Category: Custom IC Design

By asetji

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updated over 8 years ago by asetji

2 replies • 15000 views
Discussion

How can I use a vpwlf source with design variable for filename in AMS simulator (with UNL)?

Category: Custom IC Design

By mad monster

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updated over 8 years ago by mad monster

1 replies • 6979 views
Discussion

Printing Corner Analysis information using VerilogA module

Category: Custom IC Design

By ashrafSazid

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started over 8 years ago

0 replies • 12907 views
Discussion

Hierarchy Editor: Instance bindings @ 2nd level of hierarchy depth

Category: Custom IC Design

By PNadeau

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updated over 8 years ago by PNadeau

2 replies • 14951 views
Discussion

Automatic naming of ADEXL history items

Category: Custom IC Design

By PNadeau

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started over 8 years ago

0 replies • 14066 views

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