Custom IC Design

Latest Posts

Discussion

Swapping in DSPF netlists using the Hierarchy Editor?

Category: Custom IC Design

By ckteng

$usertype
•
updated over 10 years ago by ckteng

4 replies • 17339 views
Discussion

load .cxt file in virtuoso

Category: Custom IC Design

By Varun Gupta

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 15454 views
Discussion

P-Cell installation (FreePDK45)

Category: Custom IC Design

By ahmed589

$usertype
•
updated over 10 years ago by Quek

1 replies • 16713 views
Discussion

Back to Basics

Category: Custom IC Design

By analogy

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 13536 views
Discussion

ncelab: *F,TOOMTS: more than one -TIMESCALE option.

Category: Custom IC Design

By Ctree

$usertype
•
updated over 10 years ago by Andrew Beckett

3 replies • 2953 views
Discussion

Relxpert circuit aging simulation

Category: Custom IC Design

By pedrofausto

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 13815 views
Discussion

VerilogIn import of structural/behavioral design

Category: Custom IC Design

By JohnB70

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 1281 views
Discussion

Automatically create verilog views

Category: Custom IC Design

By JohnB70

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 14252 views
Discussion

ADE-XL not running

Category: Custom IC Design

By syafiq

$usertype
•
updated over 10 years ago by Andrew Beckett

2 replies • 14891 views
Discussion

Total integrated noise figure

Category: Custom IC Design

By itos

$usertype
•
updated over 10 years ago by itos

2 replies • 19766 views
Discussion

ADE XL: Limiting the max number of jobs in Local simulation mode?

Category: Custom IC Design

By kentauta

$usertype
•
updated over 10 years ago by kentauta

2 replies • 15358 views
Discussion

Embedding or popping out the Palette window from the layout editor...

Category: Custom IC Design

By deklein

$usertype
•
updated over 10 years ago by deklein

2 replies • 15909 views
Discussion

Noise Simulation of Chopper Amplifier using PSS & Pnoise

Category: Custom IC Design

By jdp721

$usertype
•
started over 10 years ago

0 replies • 6479 views
Discussion

Simulating stability of single ended circuit wrt to a local gnd, not gnd!

Category: Custom IC Design

By Bill Toole

$usertype
•
updated over 10 years ago by Frank Wiedmann

6 replies • 17798 views
Discussion

Adding a cap in Ultrasim requires an additional probe statement - any workaround?

Category: Custom IC Design

By ckteng

$usertype
•
updated over 10 years ago by ckteng

6 replies • 2132 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.