Custom IC Design

Latest Posts

Discussion

L's and C's and Bsource

Category: Custom IC Design

By kevinv
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updated over 13 years ago by kevinv

2 replies • 1483 views
Discussion

Initial Condition Sweep

Category: Custom IC Design

By ddr71m
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updated over 13 years ago by Andrew Beckett

1 replies • 13202 views
Discussion

Regions of Operation for Transistors

Category: Custom IC Design

By JustinTaylor86
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updated over 13 years ago by Andrew Beckett

1 replies • 15343 views
Discussion

how to avoid recompiling ahdlcmi?

Category: Custom IC Design

By freitas
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updated over 13 years ago by Andrew Beckett

2 replies • 14266 views
Discussion

question about cadence virtuoso

Category: Custom IC Design

By titanic
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updated over 13 years ago by Andrew Beckett

3 replies • 14005 views
Discussion

error in assura rcx (parasitic extraction)

Category: Custom IC Design

By kpkp
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updated over 13 years ago by Quek

1 replies • 13321 views
Discussion

Nodeset for subcircuit

Category: Custom IC Design

By titanic
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updated over 13 years ago by Andrew Beckett

2 replies • 15682 views
Discussion

Assura LVS - number of edges of first layer butting/coincident with the second layer

Category: Custom IC Design

By windowsdee
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updated over 13 years ago by Quek

1 replies • 725 views
Discussion

analog-mixed signal simulation with verilog-a vhdl and circuit components

Category: Custom IC Design

By Zitty
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updated over 13 years ago by Zitty

4 replies • 15310 views
Discussion

mmsim61

Category: Custom IC Design

By wighou
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updated over 13 years ago by Andrew Beckett

1 replies • 12815 views
Discussion

How to Find content of Bonding Box.

Category: Custom IC Design

By ShrikantTI
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updated over 13 years ago by ShrikantTI

2 replies • 13239 views
Discussion

How to simulate full custom digital circuit digitally in virtuoso(spectre)

Category: Custom IC Design

By wenxuzhao
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updated over 13 years ago by Andrew Beckett

6 replies • 5132 views
Discussion

Parallel Monte Carlo runs using AMS?

Category: Custom IC Design

By aakhavan
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updated over 13 years ago by Andrew Beckett

1 replies • 13493 views
Discussion

Error during ASSURA parasitic extraction.

Category: Custom IC Design

By RAO VINAY
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updated over 13 years ago by Quek

1 replies • 13330 views
Discussion

skill to detect ADEXL options

Category: Custom IC Design

By ejm20
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updated over 13 years ago by Michael85

38 replies • 26901 views

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