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Custom IC Design

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  • Discussion

    Disable instances in Schematic

    Category: Custom IC Design

    By Zdeno

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    updated over 6 years ago by Andrew Beckett

    5 replies • 24875 views
  • Discussion

    Customizing library manager menus

    Category: Custom IC Design

    By NickA

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    •

    updated over 6 years ago by Andrew Beckett

    3 replies • 15258 views
  • Discussion

    pin placement Level-1 pins

    Category: Custom IC Design

    By DaveHelsen

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    •

    updated over 6 years ago by Andrew Beckett

    5 replies • 14290 views
  • Discussion

    putprop error running Quantus with Calibre inputs

    Category: Custom IC Design

    By ArturS

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    updated over 6 years ago by Andrew Beckett

    1 replies • 6604 views
  • Discussion

    Inconsistent phase noise results of divide-by-2 phase using different PNOISE method

    Category: Custom IC Design

    By Cod Liang

    $usertype

    •

    updated over 6 years ago by Frank Wiedmann

    9 replies • 18143 views
  • Discussion

    Change size of all the solder dots in the schematic

    Category: Custom IC Design

    By bid75

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    •

    updated over 6 years ago by bid75

    6 replies • 18360 views
  • Discussion

    A divide by zero exception has occurred

    Category: Custom IC Design

    By BaaB

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    •

    updated over 6 years ago by Andrew Beckett

    3 replies • 15766 views
  • Discussion

    how to draw using y vs y?

    Category: Custom IC Design

    By SGGS

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    •

    updated over 6 years ago by Candido

    2 replies • 20382 views
  • Discussion

    Phase Noise simulation accuracy

    Category: Custom IC Design

    By Gmacera

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    •

    updated over 6 years ago by Frank Wiedmann

    1 replies • 13368 views
  • Discussion

    Cadence Liberate for characterizing

    Category: Custom IC Design

    By fengye

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    •

    updated over 6 years ago by fengye

    8 replies • 16891 views
  • Discussion

    LVS: Calibre Missing Instance

    Category: Custom IC Design

    By wgtkan

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    •

    updated over 6 years ago by wgtkan

    2 replies • 18396 views
  • Discussion

    Is there a way to customize the netlist fom subckt netlister(like ansCdlSubcktCall and ansCdlSubcktCallExtended)?

    Category: Custom IC Design

    By zssfred

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    updated over 6 years ago by zssfred

    6 replies • 1999 views
  • Discussion

    Exporting the waveforms from Cadence ADE to plot it in Mathlab

    Category: Custom IC Design

    By NorNand

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    •

    updated over 6 years ago by NorNand

    2 replies • 15052 views
  • Discussion

    It seems auCdlPutMathExprInSingleQuotes only works for subckt netlister(like ansCdlSubcktCall and ansCdlSubcktCallExtended) not for instance netlister(like ansCdlHnlPrintInst). Is it possible to make it happen too?

    Category: Custom IC Design

    By zssfred

    $usertype

    •

    updated over 6 years ago by zssfred

    4 replies • 1313 views
  • Discussion

    what is the difference between "parseAsCEL no" and "parseAsCEL don't use"?

    Category: Custom IC Design

    By zssfred

    $usertype

    •

    updated over 6 years ago by zssfred

    4 replies • 2163 views
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