Custom IC Design

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ERROR (LBRCXM-644): Bad return status from RCX script generator. 0xb

Category: Custom IC Design

By RakeshKumar

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updated over 8 years ago by Quek

5 replies • 16282 views
Discussion

Sheet resistance information

Category: Custom IC Design

By samer1

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updated over 8 years ago by samer1

2 replies • 14419 views
Discussion

Modification of the Extracted files (Through Cadence tools)

Category: Custom IC Design

By samer1

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updated over 8 years ago by samer1

2 replies • 13638 views
Discussion

PhysConfig: Set physical parameters when using force descend.

Category: Custom IC Design

By RVERP

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updated over 8 years ago by Quek

1 replies • 13777 views
Discussion

GMRES solver convergence issue during PNOISE analysis

Category: Custom IC Design

By Junyi

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updated over 8 years ago by Quek

1 replies • 15106 views
Discussion

Cell only in schematic but not layout

Category: Custom IC Design

By itos

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updated over 8 years ago by Quek

1 replies • 13634 views
Discussion

Tracing net through few metal layers.

Category: Custom IC Design

By GDCRA

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updated over 8 years ago by Quek

2 replies • 14097 views
Discussion

Loading Default setting in cds initalization

Category: Custom IC Design

By wgtkan

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updated over 8 years ago by Quek

1 replies • 13894 views
Discussion

Layout Make readonly/Review Request

Category: Custom IC Design

By JackPro

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updated over 8 years ago by Quek

1 replies • 938 views
Discussion

can AEL(analog Expression Language) evaluate strings?

Category: Custom IC Design

By karis86

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started over 8 years ago

0 replies • 1008 views
Discussion

Regarding accumulated long term jitter sim using PSS/PNOISE

Category: Custom IC Design

By SomanP

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started over 8 years ago

0 replies • 1307 views
Discussion

Create VIA form disappears

Category: Custom IC Design

By RaghavasimhanT

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updated over 8 years ago by Andrew Beckett

2 replies • 15013 views
Discussion

Custom colors for waveform viewer and net selection in Virtuoso

Category: Custom IC Design

By Aldo2

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updated over 8 years ago by Frank Wiedmann

1 replies • 13369 views
Discussion

How to know the most critical node that set my minimum transient time step ?

Category: Custom IC Design

By Johanny Saenz

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updated over 8 years ago by Frank Wiedmann

1 replies • 13173 views
Discussion

Extracted Netlist Simulation Speedup?

Category: Custom IC Design

By MMueller

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updated over 8 years ago by Andrew Beckett

2 replies • 13783 views

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