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Custom IC Design

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  • Discussion

    Diva extraction warnings on large layout

    Category: Custom IC Design

    By Zach Zach

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 12786 views
  • Discussion

    Jitter in Strong and Weak Inversions

    Category: Custom IC Design

    By pcardoso73 pcardoso73

    •

    updated over 14 years ago by pcardoso73

    1 replies • 13026 views
  • Discussion

    Regular expressions in a schematic search

    Category: Custom IC Design

    By J Wilwert J Wilwert

    •

    updated over 14 years ago by J Wilwert

    2 replies • 13196 views
  • Discussion

    Problem in importing CDL/Spice netlist ...?

    Category: Custom IC Design

    By Prabhu The ICL Prabhu The ICL

    •

    updated over 14 years ago by Quek

    7 replies • 9731 views
  • Discussion

    Making symbol text unselectable on an instance

    Category: Custom IC Design

    By swdesigner swdesigner

    •

    started over 14 years ago

    0 replies • 13674 views
  • Discussion

    Re: How to do analog modeling with verilog -A

    Category: Custom IC Design

    By Analog Design Analog Design

    •

    updated over 14 years ago by Quek

    1 replies • 557 views
  • Discussion

    phase error in OTA amplifier

    Category: Custom IC Design

    By mozdas mozdas

    •

    updated over 14 years ago by Quek

    1 replies • 13406 views
  • Discussion

    Virtuoso - how can I create an instance from a .inc HSPICE file?

    Category: Custom IC Design

    By Alex2kdl Alex2kdl

    •

    updated over 14 years ago by Quek

    1 replies • 3001 views
  • Discussion

    Snaping on StreamIn

    Category: Custom IC Design

    By JustinAtmel JustinAtmel

    •

    updated over 14 years ago by Quek

    1 replies • 12960 views
  • Discussion

    Exporting files

    Category: Custom IC Design

    By EveBell EveBell

    •

    updated over 14 years ago by Quek

    4 replies • 14390 views
  • Discussion

    Assura LVS execution terminated

    Category: Custom IC Design

    By razvanm razvanm

    •

    updated over 14 years ago by Quek

    11 replies • 18596 views
  • Discussion

    calibre rules conversion to assura rules?

    Category: Custom IC Design

    By linbo linbo

    •

    updated over 14 years ago by Quek

    1 replies • 13626 views
  • Discussion

    Connectivity Mark Net for temporary layers

    Category: Custom IC Design

    By mvalery mvalery

    •

    updated over 14 years ago by mvalery

    2 replies • 13494 views
  • Discussion

    layer visibility and LSW palette

    Category: Custom IC Design

    By wighou wighou

    •

    updated over 14 years ago by skillUser

    1 replies • 13835 views
  • Discussion

    Want to calculate No of M2 layers in standard cells

    Category: Custom IC Design

    By srikanth143 srikanth143

    •

    updated over 14 years ago by Andrew Beckett

    3 replies • 13231 views
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