Custom IC Design

Latest Posts

Discussion

Strange behavior of constraint manager for instance bus

Category: Custom IC Design

By Rushang

$usertype
•
started over 13 years ago

0 replies • 12919 views
Discussion

Use standalone scs tech file

Category: Custom IC Design

By gocoba

$usertype
•
updated over 13 years ago by Andrew Beckett

2 replies • 15451 views
Discussion

The way a Param shows up on the symbol.

Category: Custom IC Design

By MarkTown

$usertype
•
updated over 13 years ago by MarkTown

4 replies • 13737 views
Discussion

Memory corruption freezing Cadence Virtuoso

Category: Custom IC Design

By Wonyoung

$usertype
•
updated over 13 years ago by Andrew Beckett

1 replies • 13701 views
Discussion

eye mask option in ADE XL

Category: Custom IC Design

By archive

$usertype
•
started over 13 years ago

0 replies • 12605 views
Discussion

How to calculate the floating gate Capacitors?

Category: Custom IC Design

By Muffassir

$usertype
•
started over 13 years ago

0 replies • 13004 views
Discussion

question about LSW window in IC5141

Category: Custom IC Design

By jimito13

$usertype
•
updated over 13 years ago by jimito13

2 replies • 13258 views
Discussion

How to combine two plots y1=f(v1) & y2=f(v2)

Category: Custom IC Design

By SUEE

$usertype
•
updated over 13 years ago by Andrew Beckett

11 replies • 8033 views
Discussion

parametric simulation issue

Category: Custom IC Design

By jimito13

$usertype
•
started over 13 years ago

0 replies • 12691 views
Discussion

post layout simulation issues

Category: Custom IC Design

By gnangotzi

$usertype
•
started over 13 years ago

0 replies • 13404 views
Discussion

Why the AWD only plot up to ~20ms

Category: Custom IC Design

By SUEE

$usertype
•
updated over 13 years ago by SUEE

2 replies • 13152 views
Discussion

Measuring loop gain of 6T SRAM during write operation

Category: Custom IC Design

By Ivan13

$usertype
•
updated over 13 years ago by Andrew Beckett

3 replies • 13973 views
Discussion

How to rename ok button?

Category: Custom IC Design

By bobbygang

$usertype
•
updated over 13 years ago by Andrew Beckett

3 replies • 13496 views
Discussion

Diva extraction error with Digital BlackBox cells ?

Category: Custom IC Design

By isazulkc

$usertype
•
updated over 13 years ago by isazulkc

4 replies • 13544 views
Discussion

How to make a unique name for verilog output?

Category: Custom IC Design

By naderi

$usertype
•
updated over 13 years ago by naderi

4 replies • 15034 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.