Custom IC Design

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Discussion

why i have such a pop-up window when editing symbol

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by sjwprcker

2 replies • 8107 views
Discussion

virtguoso layout non-exsist file list in hierarchy

Category: Custom IC Design

By mgkang

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started over 3 years ago

0 replies • 6955 views
Discussion

Adexl Reference Netlist - new runs still point to old netlist even with Reference Netlist disabled

Category: Custom IC Design

By firebolt

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updated over 3 years ago by firebolt

2 replies • 1602 views
Discussion

Matlab cadence integration setup

Category: Custom IC Design

By AtaV

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updated over 3 years ago by AtaV

4 replies • 9828 views
Discussion

ADE Assembler: Strange corner GUI observations

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by StephanWeber

2 replies • 8297 views
Discussion

NO CC in PEX for fringe capacitance (the same as MOM)

Category: Custom IC Design

By lowENC

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updated over 3 years ago by lowENC

2 replies • 9857 views
Discussion

CAN THE DIFFUSION REGION EXCEED THE PR BOUNDARY IN HEIGHT?

Category: Custom IC Design

By Aditya Karthik

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started over 3 years ago

0 replies • 7393 views
Discussion

Adexl - auto locking Interactive when run finishes

Category: Custom IC Design

By firebolt

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updated over 3 years ago by firebolt

9 replies • 3371 views
Discussion

Schematic Navigator - cell list hierarchy is displaying like flattened post layout format

Category: Custom IC Design

By firebolt

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updated over 3 years ago by firebolt

6 replies • 2575 views
Discussion

Adexl Interactive - disable appending number to already renamed job

Category: Custom IC Design

By firebolt

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updated over 3 years ago by firebolt

2 replies • 1299 views
Discussion

Extending a tran sim?

Category: Custom IC Design

By kenc184

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updated over 3 years ago by Andrew Beckett

9 replies • 12580 views
Discussion

Shortcut to Open Layout View of Currently Open Cell in New Tab

Category: Custom IC Design

By sgcad

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updated over 3 years ago by sgcad

6 replies • 10520 views
Discussion

ADE maestro results table: How can I filter out empty cells?

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by StephanWeber

2 replies • 8783 views
Discussion

Power and delay of digital circuits using cadence

Category: Custom IC Design

By Aswathyn

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updated over 3 years ago by Aswathyn

5 replies • 10986 views
Discussion

passing global variable to ADE output

Category: Custom IC Design

By TommasoF

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updated over 3 years ago by TommasoF

12 replies • 14286 views

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