Custom IC Design

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Discussion

cdsenv to display multi test editor

Category: Custom IC Design

By sjwprcker

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updated 8 months ago by sjwprcker

2 replies • 1994 views
Discussion

cdl export error when lvs with dracula

Category: Custom IC Design

By yogeshjaiswalCAD

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updated 8 months ago by yogeshjaiswalCAD

7 replies • 2974 views
Discussion

Can't find documentation on Spectre warnings SFE-83 and SFE-47

Category: Custom IC Design

By mikewu999

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updated 8 months ago by Andrew Beckett

5 replies • 1051 views
Discussion

Monte Carlo Voltage Source

Category: Custom IC Design

By JO202503011751

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updated 8 months ago by JO202503011751

4 replies • 2583 views
Discussion

can I have a if statement for the config

Category: Custom IC Design

By Mooh

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updated 8 months ago by Andrew Beckett

3 replies • 2204 views
Discussion

Can't display the result of Jee

Category: Custom IC Design

By littleneil

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updated 8 months ago by Andrew Beckett

1 replies • 411 views
Discussion

Spectre simulation ERROR, convergence issue

Category: Custom IC Design

By SM202501097919

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updated 8 months ago by Andrew Beckett

3 replies • 3750 views
Discussion

HBSP simulation of Gilbert Cell Mixer

Category: Custom IC Design

By HuyDo

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started 8 months ago

0 replies • 1953 views
Discussion

How do I select data set for Explorer->Direct Plot ?

Category: Custom IC Design

By BillH314

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updated 8 months ago by BillH314

2 replies • 529 views
Discussion

Unbound Variable 'red' in ASCII Technology File

Category: Custom IC Design

By JJ202502261359

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updated 8 months ago by Andrew Beckett

1 replies • 494 views
Discussion

Issue Adding New Layers to Tech ASCII File in Virtuoso 6.1.7

Category: Custom IC Design

By JJ202502261359

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updated 8 months ago by JJ202502261359

2 replies • 2215 views
Discussion

ERROR (VACOMP-1070): Internal Compiling Error

Category: Custom IC Design

By USAAWA

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updated 8 months ago by USAAWA

2 replies • 2225 views
Discussion

iPar error when used in CDF

Category: Custom IC Design

By JS20250120924

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updated 8 months ago by JS20250120924

4 replies • 2616 views
Discussion

Verilog AMS simulation error

Category: Custom IC Design

By MS202502248626

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updated 8 months ago by Andrew Beckett

1 replies • 2101 views
Discussion

Virtuoso Hierarchy Editor unable to find primitive resistor/capacitor/inductor

Category: Custom IC Design

By Nett

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updated 8 months ago by Andrew Beckett

3 replies • 1090 views

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