Custom IC Design

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Using SPICE level 3 MOSFET model in SPECTRE

Category: Custom IC Design

By keensport

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updated over 9 years ago by Andrew Beckett

1 replies • 16095 views
Discussion

ic5141 value stack (second) over flow problem

Category: Custom IC Design

By rockyman

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updated over 9 years ago by Andrew Beckett

1 replies • 13236 views
Discussion

standard cell design

Category: Custom IC Design

By RajawatMANIT

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started over 9 years ago

0 replies • 12930 views
Discussion

Interconnect reliability

Category: Custom IC Design

By rafaelon

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updated over 9 years ago by Andrew Beckett

1 replies • 13190 views
Discussion

ADE windowID for a given sevSession?

Category: Custom IC Design

By yeh1

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updated over 9 years ago by Andrew Beckett

3 replies • 13707 views
Discussion

CDL generation with command si: how to specify a path instead of "netlist" for the resultFile ?

Category: Custom IC Design

By samung

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updated over 9 years ago by samung

2 replies • 3933 views
Discussion

psub and nwell via not present in 90nm layout

Category: Custom IC Design

By PS90

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updated over 9 years ago by ColinSutlieff

1 replies • 13936 views
Discussion

Display Issue in IC6.1.6 (64 bit) on CentOS

Category: Custom IC Design

By Raghu Rao

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updated over 9 years ago by Andrew Beckett

2 replies • 13934 views
Discussion

simulation a circuit with organic transistors

Category: Custom IC Design

By robert11

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updated over 9 years ago by ArchAngelos

4 replies • 14224 views
Discussion

AMS netlisting has failed

Category: Custom IC Design

By elfmushroom

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updated over 9 years ago by elfmushroom

2 replies • 17357 views
Discussion

Liberate (pass/file bisection)

Category: Custom IC Design

By kasula5

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started over 9 years ago

0 replies • 481 views
Discussion

Printed OFET PDK Development

Category: Custom IC Design

By ramkumarg

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updated over 9 years ago by robert11

2 replies • 13118 views
Discussion

Changing default settings of Virtuoso Layout XL

Category: Custom IC Design

By Clidre

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updated over 9 years ago by Clidre

2 replies • 18120 views
Discussion

How to fix layers after changing layer numbers in the technology file

Category: Custom IC Design

By Sheppy

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updated over 9 years ago by theopaone

5 replies • 17664 views
Discussion

how to attach a new device file in cadence virtuoso version 6.1.2

Category: Custom IC Design

By RAVI2100

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updated over 9 years ago by Quek

1 replies • 13494 views

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