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Custom IC Design

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  • Discussion

    Modifying ADL Defaults (State Load/Save Directory, Plot After Simulation, What to Save)

    Category: Custom IC Design

    By sgcad sgcad

    •

    updated over 2 years ago by sgcad

    2 replies • 3187 views
  • Discussion

    Spectre: what is the purpose of the "trannoisemethod" parameter?

    Category: Custom IC Design

    By dontpanic dontpanic

    •

    updated over 2 years ago by dontpanic

    5 replies • 1909 views
  • Discussion

    Differential .stb analysis by referencing terminals on an av_extracted view including devices with multiplier

    Category: Custom IC Design

    By DavidI DavidI

    •

    updated over 2 years ago by Frank Wiedmann

    14 replies • 11748 views
  • Discussion

    IR drop

    Category: Custom IC Design

    By Kalid13 Kalid13

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 7643 views
  • Discussion

    Removing Redundant Sweep Variable in ViVa/Calculator

    Category: Custom IC Design

    By sgcad sgcad

    •

    started over 2 years ago

    0 replies • 686 views
  • Discussion

    Difference between Array Via Spacing and Via Merging

    Category: Custom IC Design

    By saurabh96 saurabh96

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 6964 views
  • Discussion

    ADE Assembler: Global Variable Sweeps vs. Corner Sweeps, Practicality and Philosophy?

    Category: Custom IC Design

    By TempViator TempViator

    •

    started over 2 years ago

    0 replies • 6594 views
  • Discussion

    Spectre X: is "noisefmax" treated differently in the various accuracy modes?

    Category: Custom IC Design

    By dontpanic dontpanic

    •

    updated over 2 years ago by ShawnLogan

    2 replies • 1982 views
  • Discussion

    How to changeDPUPERUU

    Category: Custom IC Design

    By Sutlieff Sutlieff

    •

    updated over 2 years ago by Sutlieff

    1 replies • 7395 views
  • Discussion

    Monte Carlo Mismatch Operating Region Discrepancy

    Category: Custom IC Design

    By illaoi illaoi

    •

    updated over 2 years ago by illaoi

    10 replies • 10058 views
  • Discussion

    LVS - not compared, number of port 0 in layout

    Category: Custom IC Design

    By ISHITA AGGARWAL ISHITA AGGARWAL

    •

    updated over 2 years ago by Andrew Beckett

    3 replies • 2768 views
  • Discussion

    calibreview lack all nets which connect with res and cap

    Category: Custom IC Design

    By dogman4 dogman4

    •

    updated over 2 years ago by dogman4

    2 replies • 7644 views
  • Discussion

    Equivalent Noise Charge (ENC) Calculation of a Charge Sensitive Amplifier in Cadence Virtuoso

    Category: Custom IC Design

    By Hamzarfcs2 Hamzarfcs2

    •

    updated over 2 years ago by ebecheto

    3 replies • 8432 views
  • Discussion

    Saving output bus in ADE Explorer

    Category: Custom IC Design

    By Senan Senan

    •

    updated over 2 years ago by Senan

    2 replies • 8270 views
  • Discussion

    Light version of virtuoso

    Category: Custom IC Design

    By nrk1 nrk1

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 7366 views
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