Custom IC Design

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Discussion

stb analysis after tran -any options required?

Category: Custom IC Design

By kenc184

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updated over 3 years ago by kenc184

2 replies • 2829 views
Discussion

How to see and get rid of design variables attached to cell schematic?

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by StephanWeber

9 replies • 13294 views
Discussion

Integrate IC618 with FreePDK45

Category: Custom IC Design

By xiangumass

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started over 3 years ago

0 replies • 8439 views
Discussion

DC and STB analysis reuse in larger sweeps

Category: Custom IC Design

By jehh

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updated over 3 years ago by jehh

3 replies • 8381 views
Discussion

Can I set the order for the statistical parameter box in MC histograms?

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by Andrew Beckett

1 replies • 7490 views
Discussion

Error during snapshots launch simulator

Category: Custom IC Design

By blossom

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updated over 3 years ago by Andrew Beckett

1 replies • 7992 views
Discussion

while simulating counter i got an error

Category: Custom IC Design

By blossom

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updated over 3 years ago by blossom

4 replies • 8820 views
Discussion

while compiling counter program i got an error

Category: Custom IC Design

By blossom

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updated over 3 years ago by blossom

3 replies • 8391 views
Discussion

What are the noise options under simulator options?

Category: Custom IC Design

By david73

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updated over 3 years ago by FormerMember

1 replies • 8931 views
Discussion

programable pattern generator

Category: Custom IC Design

By hdeshmukhnvidia

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updated over 3 years ago by FormerMember

2 replies • 9628 views
Discussion

SNR calculation wrong by 3 dB?

Category: Custom IC Design

By Fede26

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updated over 3 years ago by FormerMember

11 replies • 16460 views
Discussion

Post Layout Netlist - does order of devices and parasitic caps matter for accurate results?

Category: Custom IC Design

By firebolt

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updated over 3 years ago by firebolt

2 replies • 1524 views
Discussion

why i have such a pop-up window when editing symbol

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by sjwprcker

2 replies • 8100 views
Discussion

virtguoso layout non-exsist file list in hierarchy

Category: Custom IC Design

By mgkang

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started over 3 years ago

0 replies • 6949 views
Discussion

Adexl Reference Netlist - new runs still point to old netlist even with Reference Netlist disabled

Category: Custom IC Design

By firebolt

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updated over 3 years ago by firebolt

2 replies • 1601 views

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