• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Layout integration

    Category: Custom IC Design

    By Arashka

    $usertype

    •

    updated over 3 years ago by iq79

    1 replies • 7873 views
  • Discussion

    tsmc65nm DFM_options

    Category: Custom IC Design

    By zaki177

    $usertype

    •

    updated over 3 years ago by iq79

    2 replies • 8542 views
  • Discussion

    pss+pstb simulation of boost converter when it is unstable

    Category: Custom IC Design

    By midaslab

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    3 replies • 2322 views
  • Discussion

    spectre netlist

    Category: Custom IC Design

    By shaarawy2023

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 8246 views
  • Discussion

    How to split device fingers in Virtuoso MODGEN

    Category: Custom IC Design

    By Nader Fathy

    $usertype

    •

    updated over 3 years ago by Nader Fathy

    1 replies • 9278 views
  • Discussion

    How to read in a text file separated by delays in Verilog A. They delays are relative and to be read from the text file?

    Category: Custom IC Design

    By Nisharg shah

    $usertype

    •

    started over 3 years ago

    0 replies • 7729 views
  • Discussion

    Simple example/template for a (matrix based, if possible) schematic pcell

    Category: Custom IC Design

    By SteveVrk

    $usertype

    •

    updated over 3 years ago by SteveVrk

    3 replies • 2304 views
  • Discussion

    Accessing analog voltages in hierarchy from Verilog AMS

    Category: Custom IC Design

    By amacSS

    $usertype

    •

    updated over 3 years ago by amacSS

    4 replies • 10162 views
  • Discussion

    use of calcVal() to access expressions from other tests

    Category: Custom IC Design

    By AncisMichele

    $usertype

    •

    updated over 3 years ago by AncisMichele

    4 replies • 18725 views
  • Discussion

    2x1 mux Shorted Internal Nets lvs error

    Category: Custom IC Design

    By ehdwns48

    $usertype

    •

    started over 3 years ago

    0 replies • 8300 views
  • Discussion

    Netlister's subcircuit naming convention

    Category: Custom IC Design

    By ZoltanT

    $usertype

    •

    updated over 3 years ago by lchensd

    8 replies • 4251 views
  • Discussion

    Drawing an Elongated Ellipse Shape

    Category: Custom IC Design

    By Ynishant

    $usertype

    •

    updated over 3 years ago by Ynishant

    2 replies • 8763 views
  • Discussion

    DRC Flat Hierarchical Errors

    Category: Custom IC Design

    By Kevin Buck

    $usertype

    •

    started over 3 years ago

    0 replies • 7642 views
  • Discussion

    CDF Parameter not found

    Category: Custom IC Design

    By SuminJ

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 8401 views
  • Discussion

    ViVA: How how to save all pictures quickly?

    Category: Custom IC Design

    By StephanWeber

    $usertype

    •

    updated over 3 years ago by StephanWeber

    2 replies • 8110 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information