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Custom IC Design

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  • Discussion

    How to turn OFF DRC Check during layouting

    Category: Custom IC Design

    By Casp

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    updated over 4 years ago by Andrew Beckett

    6 replies • 22247 views
  • Discussion

    How to Describe Branch Current with Bsource

    Category: Custom IC Design

    By Chiaos

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    updated over 4 years ago by Andrew Beckett

    4 replies • 12748 views
  • Discussion

    Setting port order of symbol view using SKILL

    Category: Custom IC Design

    By Sheppy

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    updated over 4 years ago by Andrew Beckett

    3 replies • 16858 views
  • Discussion

    How to model bidir switch in RNM

    Category: Custom IC Design

    By dontknow

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    updated over 4 years ago by Frank Wiedmann

    5 replies • 14539 views
  • Discussion

    Schematics On White Background

    Category: Custom IC Design

    By switchy

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    updated over 4 years ago by Andrew Beckett

    2 replies • 14756 views
  • Discussion

    Error detected in psf library while writing to file `tran.tran'.

    Category: Custom IC Design

    By NupurSpectre

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    updated over 4 years ago by Andrew Beckett

    4 replies • 6569 views
  • Discussion

    Simulate variable number of symbol blocks

    Category: Custom IC Design

    By KenKim

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    started over 4 years ago

    0 replies • 10932 views
  • Discussion

    same schematic and analysis - different results?

    Category: Custom IC Design

    By JorisLambrecht

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    updated over 4 years ago by FormerMember

    8 replies • 5170 views
  • Discussion

    Will RHEL 8 work with IC6.1.8

    Category: Custom IC Design

    By wgtkan

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    updated over 4 years ago by Quek

    1 replies • 14174 views
  • Discussion

    Differential Pair Measurement

    Category: Custom IC Design

    By KenKim

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    updated over 4 years ago by KenKim

    4 replies • 12124 views
  • Discussion

    Changing Monte Carlo Seed automatically

    Category: Custom IC Design

    By MonaG

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    updated over 4 years ago by FormerMember

    7 replies • 15407 views
  • Discussion

    ADE Assembler evaulates expression prior to simulating - long wait

    Category: Custom IC Design

    By jehh

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    updated over 4 years ago by FormerMember

    4 replies • 2800 views
  • Discussion

    Simulate Variable Capacitor

    Category: Custom IC Design

    By KenKim

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    updated over 4 years ago by KenKim

    2 replies • 14256 views
  • Discussion

    SKILL: How to have multiple schematics open and modify the instance properties in them without closing the schematics

    Category: Custom IC Design

    By ExcaIibur

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    updated over 4 years ago by drdanmc

    1 replies • 12796 views
  • Discussion

    Ideal ADC model setting in adhllib

    Category: Custom IC Design

    By Mostafa A

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    •

    updated over 4 years ago by Mostafa A

    8 replies • 21916 views
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