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Custom IC Design

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  • Discussion

    Assura LVS: Clarification on virtual connection using joinablePin() function.

    Category: Custom IC Design

    By ShrikantTI

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    updated over 13 years ago by Quek

    1 replies • 14571 views
  • Discussion

    effective length variation after Monte Carlo trial

    Category: Custom IC Design

    By inessadm

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    •

    updated over 13 years ago by Andrew Beckett

    6 replies • 15068 views
  • Discussion

    Unwanted merge of long transistors in Assura RCX

    Category: Custom IC Design

    By Ueue

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    updated over 13 years ago by Andrew Beckett

    1 replies • 12956 views
  • Discussion

    AMS: Grid not seen in Waveforms

    Category: Custom IC Design

    By medeepak

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    •

    updated over 13 years ago by medeepak

    2 replies • 13230 views
  • Discussion

    additional properties on layers/instances

    Category: Custom IC Design

    By lawlag02

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    •

    updated over 13 years ago by lawlag02

    2 replies • 923 views
  • Discussion

    Turbo Toolbox Error

    Category: Custom IC Design

    By mjgoh

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    •

    updated over 13 years ago by Quek

    3 replies • 14176 views
  • Discussion

    Cadence 6.1.5 ADE question

    Category: Custom IC Design

    By engine2011

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    •

    updated over 13 years ago by Andrew Beckett

    2 replies • 13623 views
  • Discussion

    Do license queueing for AMS

    Category: Custom IC Design

    By RichardCh

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    •

    updated over 13 years ago by Andrew Beckett

    6 replies • 17828 views
  • Discussion

    save - excluding all signals in a subckt

    Category: Custom IC Design

    By Wonyoung

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    updated over 13 years ago by Wonyoung

    2 replies • 2110 views
  • Discussion

    IC6 design tool.

    Category: Custom IC Design

    By ICredneck

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    •

    updated over 13 years ago by ICredneck

    7 replies • 14190 views
  • Discussion

    Saving Cadence simulation data for later use

    Category: Custom IC Design

    By Wonyoung

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    •

    updated over 13 years ago by Wonyoung

    2 replies • 15683 views
  • Discussion

    VHDLIN producing symbols, not schematics

    Category: Custom IC Design

    By OOberg

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    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 13096 views
  • Discussion

    get point coordinate for edit in place

    Category: Custom IC Design

    By Aritra

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    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 12973 views
  • Discussion

    AMS Analog Elaboration Error

    Category: Custom IC Design

    By aakhavan

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    •

    updated over 13 years ago by Quek

    1 replies • 13906 views
  • Discussion

    add an ivCellType property (value: graphic) in all the layout cellviews of a library

    Category: Custom IC Design

    By isazulkc

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    •

    updated over 13 years ago by isazulkc

    9 replies • 14682 views
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