Custom IC Design

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Strange numbers in Virtuoso 6.1.5

Category: Custom IC Design

By JulianJ

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updated over 10 years ago by itos

14 replies • 17656 views
Discussion

Layout Parasitic Extraction capacitance filter

Category: Custom IC Design

By milind0y

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updated over 10 years ago by Quek

4 replies • 17137 views
Discussion

QRC: Replace a sub-cell with schematic view

Category: Custom IC Design

By nbyrne

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updated over 10 years ago by nbyrne

1 replies • 13169 views
Discussion

how to characterize flip flop with differential clock input (Liberate)

Category: Custom IC Design

By VerbekeM

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started over 10 years ago

0 replies • 14794 views
Discussion

The schematic generated via spicein turns "VDD" port to "VDD!" automatically

Category: Custom IC Design

By zczc99

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updated over 10 years ago by zczc99

4 replies • 2698 views
Discussion

Menu Bar missing from Layout window

Category: Custom IC Design

By Miguel V

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updated over 10 years ago by Andrew Beckett

2 replies • 15868 views
Discussion

Taking Picture of Schematic

Category: Custom IC Design

By Deepansh

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updated over 10 years ago by Scott Jorek

3 replies • 22619 views
Discussion

Virtuoso installation in Ubuntu 64bit

Category: Custom IC Design

By Vigna

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updated over 10 years ago by theopaone

2 replies • 21362 views
Discussion

veriloga model not being found

Category: Custom IC Design

By kristen

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updated over 10 years ago by nikita6

3 replies • 14403 views
Discussion

EMIR issue (failed to plot resistor)

Category: Custom IC Design

By NovikovBoris

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updated over 10 years ago by NovikovBoris

9 replies • 16533 views
Discussion

How to find rms input referred noise

Category: Custom IC Design

By Deepansh

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updated over 10 years ago by Andrew Beckett

1 replies • 26825 views
Discussion

Monte-Carlo simulation Cadence IC6

Category: Custom IC Design

By kalsefid

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updated over 10 years ago by Andrew Beckett

1 replies • 13824 views
Discussion

how to find number of crossings of a signal above a thershold.

Category: Custom IC Design

By vamshiky

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updated over 10 years ago by vamshiky

3 replies • 16219 views
Discussion

Problems simulating spice netlist in ADE Spectre

Category: Custom IC Design

By MoMiner1870

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started over 10 years ago

0 replies • 14564 views
Discussion

Noise simulation in Cadence

Category: Custom IC Design

By EthanRFIC

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updated over 10 years ago by analogy

5 replies • 22786 views

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