Custom IC Design

Latest Posts

Discussion

Error in delay calculation

Category: Custom IC Design

By KISHORE085
•
updated over 11 years ago by frankaurora

5 replies • 15732 views
Discussion

passing CDF parameters to verilog block in SpectreVerilog simulations

Category: Custom IC Design

By RomeshNandwana
•
updated over 11 years ago by RomeshNandwana

5 replies • 16037 views
Discussion

Switched Capacitor Bandgap Reference LVS Issue

Category: Custom IC Design

By Jake98
•
updated over 11 years ago by Jake98

3 replies • 13667 views
Discussion

Is the device capacitance bias-dependent or independent?

Category: Custom IC Design

By Alex Liao
•
updated over 11 years ago by Alex Liao

6 replies • 15311 views
Discussion

monte-carlo simulation running one seed

Category: Custom IC Design

By frogconsultant
•
updated over 11 years ago by Frank Wiedmann

12 replies • 25339 views
Discussion

HELP!!! insert gpdk180 into IC615

Category: Custom IC Design

By hTmTech
•
updated over 11 years ago by hTmTech

7 replies • 22434 views
Discussion

ADE XL - Message 1612

Category: Custom IC Design

By shayM
•
updated over 11 years ago by shayM

2 replies • 1923 views
Discussion

Creating a user defined Voltage source

Category: Custom IC Design

By Debajit B
•
updated over 11 years ago by Debajit B

3 replies • 14524 views
Discussion

ocnxlRun never returns as some splits are hung forever

Category: Custom IC Design

By Tajinder
•
updated over 11 years ago by Tajinder

3 replies • 13214 views
Discussion

SpiceIn - how to map to a total width from w and m in the CDL

Category: Custom IC Design

By WMACH
•
updated over 11 years ago by skillUser

4 replies • 4549 views
Discussion

" *Error* plus: can't handle (nil + nil) " during netlisting in icfb

Category: Custom IC Design

By yayla
•
updated over 11 years ago by shila sh

7 replies • 14251 views
Discussion

AMS simulation taking very small step sizes. Help in finding offending connect modules?

Category: Custom IC Design

By Amblikai
•
started over 11 years ago

0 replies • 13078 views
Discussion

Issue with DRC - "run is invalid"

Category: Custom IC Design

By apaj
•
updated over 11 years ago by Quek

10 replies • 4371 views
Discussion

Extracting generic devices with Assura

Category: Custom IC Design

By PietroUser
•
updated over 11 years ago by Andrew Beckett

3 replies • 13392 views
Discussion

Abstract Generator : abstract view with just "M1 net layer" => instead of "M1 drawing" and "M1 pin layers"

Category: Custom IC Design

By samung
•
updated over 11 years ago by samung

2 replies • 1605 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.