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Custom IC Design

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  • Discussion

    Liberate - Constraint search failed

    Category: Custom IC Design

    By iamKarthikBK

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    updated over 3 years ago by iamKarthikBK

    4 replies • 2560 views
  • Discussion

    How to query the Assembler results database for an evaluated expression?

    Category: Custom IC Design

    By Brad RFeng

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    updated over 3 years ago by Andrew Beckett

    5 replies • 11658 views
  • Discussion

    user defined parameter in dynamic parameter transient simulation

    Category: Custom IC Design

    By GirishW

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    updated over 3 years ago by GirishW

    2 replies • 13121 views
  • Discussion

    Moving average offset in verilogA

    Category: Custom IC Design

    By jorgevdelacruzN

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    updated over 3 years ago by slim15

    2 replies • 14130 views
  • Discussion

    Layout Instantiation shows a line

    Category: Custom IC Design

    By amssshubham

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    updated over 3 years ago by Andrew Beckett

    1 replies • 9241 views
  • Discussion

    print montecarlo correlation table

    Category: Custom IC Design

    By Michael Figueiredo

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    updated over 3 years ago by Andrew Beckett

    1 replies • 9896 views
  • Discussion

    How to point to a CDL netlist in my config view

    Category: Custom IC Design

    By Svilen64

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    updated over 3 years ago by Andrew Beckett

    1 replies • 10693 views
  • Discussion

    Access Top-Level Hierarchical Net with BSource

    Category: Custom IC Design

    By FormerMember

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    updated over 3 years ago by Andrew Beckett

    1 replies • 4037 views
  • Discussion

    Power calculation

    Category: Custom IC Design

    By abdurrahman0234

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    updated over 3 years ago by Andrew Beckett

    1 replies • 10471 views
  • Discussion

    Performing AMS simulation in cadence virtuoso, the voltage value printed out exceeds the set power supply voltage value

    Category: Custom IC Design

    By zuiying

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    updated over 3 years ago by Andrew Beckett

    1 replies • 12015 views
  • Discussion

    CalcVal cannot pass the output of previous run to the next run on simulation using Run Plan.

    Category: Custom IC Design

    By delgsy

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    updated over 3 years ago by Andrew Beckett

    5 replies • 13057 views
  • Discussion

    Voltage controlled Current source (VCCS) for ideal OTA

    Category: Custom IC Design

    By Charanraj Mohan

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    updated over 3 years ago by Andrew Beckett

    3 replies • 17366 views
  • Discussion

    How can I use statistical results, e.g., mean, standard deviation, from previous test as design (or global) variable of the current test?

    Category: Custom IC Design

    By delgsy

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    updated over 3 years ago by Andrew Beckett

    3 replies • 12565 views
  • Discussion

    Simulating standard cells to calculate energy on a cell level

    Category: Custom IC Design

    By iamKarthikBK

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    updated over 3 years ago by iamKarthikBK

    7 replies • 12223 views
  • Discussion

    How to calculate the recovery time of a waveform, using the calculator?

    Category: Custom IC Design

    By Giulio Puccioni

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    updated over 3 years ago by Giulio Puccioni

    2 replies • 11360 views
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