Custom IC Design

Latest Posts

Discussion

About PLL phase noise simulation (pss+pnoise or hb+hbnoise?)

Category: Custom IC Design

By MOS

$usertype
•
updated over 1 year ago by MOS

8 replies • 7456 views
Discussion

Symbol 'patch' in lib 'basic' may lead to different LVS results in different IC suites?

Category: Custom IC Design

By LiQY20

$usertype
•
updated over 1 year ago by LiQY20

2 replies • 2413 views
Discussion

Pulse source for unequal duty cycle

Category: Custom IC Design

By BitanMallik

$usertype
•
updated over 1 year ago by BitanMallik

2 replies • 4953 views
Discussion

How to auto-place standard cells using its own prBoundary?

Category: Custom IC Design

By RuihW

$usertype
•
updated over 1 year ago by Andrew Beckett

1 replies • 6103 views
Discussion

How do I change the name and unit of the X-axis in “plot across design points”

Category: Custom IC Design

By wangyunxin

$usertype
•
updated over 1 year ago by Andrew Beckett

1 replies • 5981 views
Discussion

How do Maestro and caculator average the waveform of a digital signal

Category: Custom IC Design

By wangyunxin

$usertype
•
updated over 1 year ago by wangyunxin

1 replies • 4965 views
Discussion

How to automatically find the final x-value of a waveform to be used by the integ() function

Category: Custom IC Design

By DomiHammerfall

$usertype
•
updated over 1 year ago by Andrew Beckett

3 replies • 5358 views
Discussion

Equation Syntax

Category: Custom IC Design

By Maria98

$usertype
•
updated over 1 year ago by Maria98

2 replies • 4974 views
Discussion

maestro Waveform renaming

Category: Custom IC Design

By wangyunxin

$usertype
•
updated over 1 year ago by Andrew Beckett

1 replies • 4950 views
Discussion

Error Layer window not appear although there is DRC error

Category: Custom IC Design

By SARAP

$usertype
•
updated over 1 year ago by Andrew Beckett

1 replies • 5148 views
Discussion

Ocean Post Processing on a sweep

Category: Custom IC Design

By david73

$usertype
•
updated over 1 year ago by Andrew Beckett

1 replies • 4916 views
Discussion

TLIN (ADS) equivalent model in CADENCE VIRTUOSO

Category: Custom IC Design

By Maria98

$usertype
•
updated over 1 year ago by ShawnLogan

2 replies • 5667 views
Discussion

port connectivity in schematic generated by EMX blackbox

Category: Custom IC Design

By ashwinrs

$usertype
•
started over 1 year ago

0 replies • 5145 views
Discussion

Not able to annotate "Region operating point

Category: Custom IC Design

By Vishesh Gupta

$usertype
•
updated over 1 year ago by Vishesh Gupta

2 replies • 1781 views
Discussion

adexl montecarlo simulations stuck

Category: Custom IC Design

By hesaliveJim

$usertype
•
updated over 1 year ago by Andrew Beckett

3 replies • 5642 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.