Custom IC Design

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ADE XL multiple tests with different corners

Category: Custom IC Design

By Tobben24

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updated over 12 years ago by Andrew Beckett

1 replies • 15615 views
Discussion

Using ocean ADEXL generate a csv output file

Category: Custom IC Design

By rkic

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updated over 12 years ago by Andrew Beckett

7 replies • 18619 views
Discussion

How to associate an extracted netlist of a subckt to the symbol view in schematic editor.

Category: Custom IC Design

By RFStuff

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updated over 12 years ago by RFStuff

8 replies • 20196 views
Discussion

Huge psf file!! Cannot allocate memory

Category: Custom IC Design

By SPA1984

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updated over 12 years ago by Andrew Beckett

3 replies • 15878 views
Discussion

How to load my configeration files from my working directory not home directory

Category: Custom IC Design

By wgtkan

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updated over 12 years ago by wgtkan

4 replies • 18158 views
Discussion

Doubt regarding layout gpdk 45nm

Category: Custom IC Design

By madhusudha

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updated over 12 years ago by theopaone

2 replies • 18462 views
Discussion

Cadence waveform viewer display error

Category: Custom IC Design

By likelike

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updated over 12 years ago by likelike

2 replies • 15494 views
Discussion

Operating Region Spec

Category: Custom IC Design

By Tobben24

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updated over 12 years ago by Andrew Beckett

1 replies • 14276 views
Discussion

ADEXL and VerilogA

Category: Custom IC Design

By Tobben24

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updated over 12 years ago by Tobben24

2 replies • 13372 views
Discussion

Edit Object property window pops up in Minimized form.

Category: Custom IC Design

By RFStuff

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updated over 12 years ago by Andrew Beckett

3 replies • 14337 views
Discussion

How to change the Symbol @partName

Category: Custom IC Design

By RFStuff

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updated over 12 years ago by Andrew Beckett

1 replies • 18322 views
Discussion

ADE XL Bug?

Category: Custom IC Design

By Tobben24

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updated over 12 years ago by Andrew Beckett

3 replies • 13413 views
Discussion

Reopen MC results after closing adexl

Category: Custom IC Design

By Tobben24

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updated over 12 years ago by Tobben24

2 replies • 14220 views
Discussion

Undo history cleared when saving schematic

Category: Custom IC Design

By Tobben24

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updated over 12 years ago by Andrew Beckett

1 replies • 14290 views
Discussion

CDB2OA Dropping Layers

Category: Custom IC Design

By LanceT

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updated over 12 years ago by LanceT

2 replies • 13232 views

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