Custom IC Design

Latest Posts

Discussion

Update W/L number in instance property, but resistor "r "value isn't change accordingly

Category: Custom IC Design

By ringamp
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updated over 4 years ago by ringamp

2 replies • 2168 views
Discussion

Can I use a variable as interpolation point in the value function?

Category: Custom IC Design

By maaz2020
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updated over 4 years ago by maaz2020

5 replies • 14050 views
Discussion

Verilog-AMS Simulation speed issue while using $table_model for reading from a file.

Category: Custom IC Design

By RFStuff
•
updated over 4 years ago by Andrew Beckett

1 replies • 10536 views
Discussion

How to pass a real array as an input argument to a function in Verilog (in AMS simulation)

Category: Custom IC Design

By RFStuff
•
updated over 4 years ago by RFStuff

2 replies • 11830 views
Discussion

Restrict ICPR SGE Job to only run 1 simulation point (ADE Assembler)

Category: Custom IC Design

By jehh
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updated over 4 years ago by Andrew Beckett

1 replies • 11558 views
Discussion

How can I fix the error in my simulation?

Category: Custom IC Design

By yysunj
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updated over 4 years ago by Andrew Beckett

3 replies • 12021 views
Discussion

Using FinFETs in OrCAD Capture

Category: Custom IC Design

By Sati
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updated over 4 years ago by Sati

2 replies • 10978 views
Discussion

Question on PSS+PNoise simulation for a Track and Hold circuit

Category: Custom IC Design

By YutaoLiu
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updated over 4 years ago by Andrew Beckett

11 replies • 13813 views
Discussion

Post Layout simulation for multi-finger transistors

Category: Custom IC Design

By Senan
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updated over 4 years ago by FormerMember

11 replies • 14893 views
Discussion

noise sim always report 0% of Total

Category: Custom IC Design

By monglebest
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updated over 4 years ago by Andrew Beckett

8 replies • 13276 views
Discussion

Working model for MDL language - A query

Category: Custom IC Design

By MicheleAncis
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updated over 4 years ago by FormerMember

2 replies • 1712 views
Discussion

Adding wreal input and output bus in verilog-AMS

Category: Custom IC Design

By RFStuff
•
updated over 4 years ago by RFStuff

5 replies • 15109 views
Discussion

HISIM-HV models

Category: Custom IC Design

By pejmank
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updated over 4 years ago by Andrew Beckett

2 replies • 11306 views
Discussion

Verilog-A white_noise function returns 0 in transient noise simulation

Category: Custom IC Design

By threepwood06
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updated over 4 years ago by threepwood06

4 replies • 11927 views
Discussion

Canceling out the parasitic diode in Layout

Category: Custom IC Design

By Hossein Eslahi
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started over 4 years ago

0 replies • 10924 views

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