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Custom IC Design

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  • Discussion

    Unexpected capacitor values in the av_extracted view file output?

    Category: Custom IC Design

    By Vishesh Gupta Vishesh Gupta

    •

    updated over 2 years ago by Vishesh Gupta

    6 replies • 7786 views
  • Discussion

    How to compare the before and after extraction values of resistance and capacitance?

    Category: Custom IC Design

    By Vishesh Gupta Vishesh Gupta

    •

    updated over 2 years ago by Vishesh Gupta

    8 replies • 7898 views
  • Discussion

    Title Block cell issue

    Category: Custom IC Design

    By Larry Allen Larry Allen

    •

    updated over 2 years ago by Andrew Beckett

    6 replies • 6885 views
  • Discussion

    Importance of "Enable CellView Check" while filling the quantus assura extraction form?

    Category: Custom IC Design

    By Vishesh Gupta Vishesh Gupta

    •

    updated over 2 years ago by Vishesh Gupta

    2 replies • 1236 views
  • Discussion

    sum of sampled_noise output spectrum, how to access the phase information?

    Category: Custom IC Design

    By NewScreenName NewScreenName

    •

    updated over 2 years ago by NewScreenName

    14 replies • 9218 views
  • Discussion

    ERROR: ADE-5014 in ams simulation

    Category: Custom IC Design

    By sjwprcker sjwprcker

    •

    updated over 2 years ago by sjwprcker

    2 replies • 6838 views
  • Discussion

    How to include extracted output in your adexl simulation?

    Category: Custom IC Design

    By Vishesh Gupta Vishesh Gupta

    •

    updated over 2 years ago by Vishesh Gupta

    6 replies • 7894 views
  • Discussion

    Changing font in "graph summary labels"

    Category: Custom IC Design

    By rrihak rrihak

    •

    started over 2 years ago

    0 replies • 690 views
  • Discussion

    Save certain waveform after simulations end while preserving corner order

    Category: Custom IC Design

    By Zaara Zaara

    •

    updated over 2 years ago by ShawnLogan

    4 replies • 6780 views
  • Discussion

    Setting default independent variable in ADE Explorer/Assembler

    Category: Custom IC Design

    By CSCNalu CSCNalu

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 1104 views
  • Discussion

    adexl does not run neither multicorner nor montecarlo simulations

    Category: Custom IC Design

    By gnangotzi gnangotzi

    •

    started over 2 years ago

    0 replies • 5583 views
  • Discussion

    Single layer auto-routing

    Category: Custom IC Design

    By sumbadee sumbadee

    •

    started over 2 years ago

    0 replies • 5794 views
  • Discussion

    Hierarchical Net Name Preservation in Quantus

    Category: Custom IC Design

    By Anas Wanas Anas Wanas

    •

    started over 2 years ago

    0 replies • 5971 views
  • Discussion

    multiple power pads when global supply name used in sub blocks?

    Category: Custom IC Design

    By kenc184 kenc184

    •

    updated over 2 years ago by kenc184

    9 replies • 9072 views
  • Discussion

    Plot Vdsat from DC sweep analysis?

    Category: Custom IC Design

    By StephanWeber StephanWeber

    •

    updated over 2 years ago by Andrew Beckett

    4 replies • 8068 views
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