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Custom IC Design

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  • Discussion

    Guidelines for the Custom IC Design Forum

    Category: Custom IC Design

    By Andrew Beckett Andrew Beckett

    •

    started over 14 years ago

    0 replies • 27920 views
  • Discussion

    Could not find netlist procedure:SpectreFNPairs instance

    Category: Custom IC Design

    By ranaya ranaya

    •

    updated 6 hours ago by Andrew Beckett

    3 replies • 147 views
  • Discussion

    Sorting variables by name alphanumerically in Virtuoso ADE Assembler / maestro

    Category: Custom IC Design

    By Dominique8765 Dominique8765

    •

    updated 8 hours ago by Andrew Beckett

    1 replies • 73 views
  • Discussion

    sweeping transistor number of fingers in a simulation

    Category: Custom IC Design

    By TommasoF TommasoF

    •

    updated 13 hours ago by TommasoF

    2 replies • 466 views
  • Discussion

    Quantus QRC issue

    Category: Custom IC Design

    By HY20250821344 HY20250821344

    •

    updated 13 hours ago by Andrew Beckett

    1 replies • 91 views
  • Discussion

    PVS LVS not flagging device W/L mismatches in gpdk045 (IC23.1 / PVS 23.11)

    Category: Custom IC Design

    By RK202509013321 RK202509013321

    •

    updated 1 day ago by Andrew Beckett

    4 replies • 172 views
  • Discussion

    xrun: *F,SROOTE: Cannot find the Spectre installation

    Category: Custom IC Design

    By Leo 93 Leo 93

    •

    updated 2 days ago by Andrew Beckett

    3 replies • 244 views
  • Discussion

    use DC sweep variable to set another variable

    Category: Custom IC Design

    By Darrell L Darrell L

    •

    updated 2 days ago by Darrell L

    2 replies • 227 views
  • Discussion

    automate cadence design to avoid time consuming steps for simulation using python subprocess module.

    Category: Custom IC Design

    By AP202507218251 AP202507218251

    •

    started 2 days ago

    0 replies • 82 views
  • Discussion

    ERROR (NVN-13010): Cell rupolym is not defined while running Pegasus LVS

    Category: Custom IC Design

    By yogeshjaiswalCAD yogeshjaiswalCAD

    •

    updated 3 days ago by Andrew Beckett

    3 replies • 211 views
  • Discussion

    All pins on schematics unconnected to their attached wires when importing EDIF from Siemens,

    Category: Custom IC Design

    By DavidGogiber DavidGogiber

    •

    updated 4 days ago by Andrew Beckett

    4 replies • 536 views
  • Discussion

    Cannot Copy Variable to Other Tests

    Category: Custom IC Design

    By MM202507017815 MM202507017815

    •

    updated 6 days ago by Andrew Beckett

    1 replies • 187 views
  • Discussion

    Cadence PEX Directory Creation - Unable to Create the Directory for Netlist

    Category: Custom IC Design

    By ranaya ranaya

    •

    updated 9 days ago by ranaya

    2 replies • 279 views
  • Discussion

    Cadence Parasitic Extraction - Location / Directory Issue

    Category: Custom IC Design

    By ranaya ranaya

    •

    updated 9 days ago by Andrew Beckett

    1 replies • 207 views
  • Discussion

    Automating Library Reference Change with Additional Parameters in New Library

    Category: Custom IC Design

    By AN202507174258 AN202507174258

    •

    started 11 days ago

    0 replies • 203 views
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