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Custom IC Design

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  • Discussion

    abstract generator resolution setting?

    Category: Custom IC Design

    By Jihoon Jihoon

    •

    updated over 14 years ago by Jihoon

    2 replies • 13312 views
  • Discussion

    Parasitic EXtraction of an interconnect capacitance

    Category: Custom IC Design

    By Ueue Ueue

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 13549 views
  • Discussion

    How to speed up verilog ams?

    Category: Custom IC Design

    By Wing2 Wing2

    •

    updated over 14 years ago by Quek

    1 replies • 13251 views
  • Discussion

    Import Digital design (std cells) into cadence ICFB and run simulations

    Category: Custom IC Design

    By ASICengg ASICengg

    •

    updated over 14 years ago by Quek

    1 replies • 14731 views
  • Discussion

    Output of Kv when my rail-rail is 15v

    Category: Custom IC Design

    By write2rammy write2rammy

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 12875 views
  • Discussion

    Transient simulation - Explanation required

    Category: Custom IC Design

    By write2rammy write2rammy

    •

    updated over 14 years ago by Andrew Beckett

    2 replies • 1143 views
  • Discussion

    What's wrong with necoell? That program doesn't run and Cadence still try to sell it?

    Category: Custom IC Design

    By archive archive

    •

    updated over 14 years ago by Andrew Beckett

    14 replies • 5378 views
  • Discussion

    IBM cms9flp & Assura QRC strange problem

    Category: Custom IC Design

    By jimito13 jimito13

    •

    updated over 14 years ago by Quek

    13 replies • 5661 views
  • Discussion

    Cadence Eclair-PM

    Category: Custom IC Design

    By Wing2 Wing2

    •

    updated over 14 years ago by Andrew Beckett

    3 replies • 13949 views
  • Discussion

    Using Custom SKILL functions with Monte Carlo in ADE and OCEAN

    Category: Custom IC Design

    By gwong gwong

    •

    updated over 14 years ago by MohEllayali

    5 replies • 13756 views
  • Discussion

    Virtuoso schematic editor: how to draw diagonal line?

    Category: Custom IC Design

    By archive archive

    •

    updated over 14 years ago by skillUser

    4 replies • 33904 views
  • Discussion

    Transfer custom vias (variant) from a design A to a design B

    Category: Custom IC Design

    By frogconsultant frogconsultant

    •

    updated over 15 years ago by frogconsultant

    5 replies • 14245 views
  • Discussion

    CDF parameters and AMS netlister

    Category: Custom IC Design

    By ArjanVanHeusde ArjanVanHeusde

    •

    started over 15 years ago

    0 replies • 12885 views
  • Discussion

    How to change simulator options as dynamic parameter?

    Category: Custom IC Design

    By fomin fomin

    •

    updated over 15 years ago by Andrew Beckett

    6 replies • 17625 views
  • Discussion

    QUESTIONS DISAPPEARED!!

    Category: Custom IC Design

    By frogconsultant frogconsultant

    •

    updated over 15 years ago by Andrew Beckett

    1 replies • 12863 views
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