Digital Implementation

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Discussion

DRC Violation

Category: Digital Implementation

By Pacific Feng

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updated over 2 years ago by DimoM

1 replies • 7957 views
Discussion

Annotating multiple dmmmc sdf files with Xcelium

Category: Digital Implementation

By DaniK

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updated over 2 years ago by DaniK

1 replies • 8836 views
Discussion

Questions about a constraint in the SDC

Category: Digital Implementation

By Goddard

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updated over 2 years ago by HumusLuke

5 replies • 10458 views
Discussion

ecoDesign - Failed to find design data with specified top cell name

Category: Digital Implementation

By Pacific Feng

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updated over 2 years ago by Pacific Feng

1 replies • 1050 views
Discussion

Segmentation Fault (core dumped) when invoking INNOVUS211

Category: Digital Implementation

By ucemqfa

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updated over 2 years ago by ucemqfa

2 replies • 9302 views
Discussion

Voltus Rail Analysis Fail: No Current Source

Category: Digital Implementation

By TONG995

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started over 2 years ago

0 replies • 7380 views
Discussion

Genus standard cells to module

Category: Digital Implementation

By JWMP

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updated over 2 years ago by DimoM

1 replies • 13539 views
Discussion

Innovus Error in Multi-thread Placement

Category: Digital Implementation

By rotic

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updated over 2 years ago by DimoM

2 replies • 11905 views
Discussion

Top-Level PnR in Innovus: Routing Power to Blocks

Category: Digital Implementation

By sbfisher

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updated over 2 years ago by sbfisher

2 replies • 8397 views
Discussion

Cannot load in netlists in Innovus: syntax error？

Category: Digital Implementation

By Zackery

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updated over 2 years ago by Zackery

2 replies • 9437 views
Discussion

Doing synthesis with a composed cell in netlist [GENUS][Verilog]

Category: Digital Implementation

By Johanny Saenz

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updated over 2 years ago by DimoM

5 replies • 4811 views
Discussion

How can I push an instance down one level in the design hierarchy

Category: Digital Implementation

By aaronginn

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updated over 2 years ago by aaronginn

3 replies • 8687 views
Discussion

Voltus 20 getting stuck during DEF import

Category: Digital Implementation

By Dracarris

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updated over 2 years ago by DimoM

1 replies • 7877 views
Discussion

Digital VLSI Power Grid Parasitic Extraction (SPEF/DSPF)

Category: Digital Implementation

By Tao247200

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updated over 2 years ago by Dracarris

1 replies • 3213 views
Discussion

PG nets are not routed with sroute

Category: Digital Implementation

By HarryDD

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updated over 2 years ago by HarryDD

3 replies • 9827 views

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