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Digital Implementation

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  • Discussion

    encounter and conformal

    Category: Digital Implementation

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    started over 17 years ago

    0 replies • 13095 views
  • Discussion

    Is it a MUST to use capTable to do .13um design?

    Category: Digital Implementation

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    updated over 17 years ago by archive

    5 replies • 14784 views
  • Discussion

    NanoRoute CRASH, need help.....VERSION SOC-E 52 Update 5

    Category: Digital Implementation

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    updated over 17 years ago by archive

    1 replies • 13535 views
  • Discussion

    Is there any approach to add global power net despite DesignImport pwoer tab?

    Category: Digital Implementation

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    started over 17 years ago

    0 replies • 13143 views
  • Discussion

    long wire transition time issues

    Category: Digital Implementation

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    updated over 17 years ago by archive

    14 replies • 19548 views
  • Discussion

    A warning when doing timing-driven NanoRoute, Urgent!

    Category: Digital Implementation

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    updated over 17 years ago by archive

    4 replies • 14453 views
  • Discussion

    no new cells at top level

    Category: Digital Implementation

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    updated over 17 years ago by archive

    3 replies • 14093 views
  • Discussion

    Ideal nets in ETS

    Category: Digital Implementation

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    started over 17 years ago

    0 replies • 13215 views
  • Discussion

    how to the error "Size of cell PADI45(80000,141660) is not an integer multiple of its site IOSite(20,400000)"

    Category: Digital Implementation

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    updated over 17 years ago by archive

    1 replies • 610 views
  • Discussion

    LVS after place&route may fail due to clock tree buffers

    Category: Digital Implementation

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    updated over 17 years ago by archive

    4 replies • 1895 views
  • Discussion

    Using a PSpice advanced part into a subcircuit

    Category: Digital Implementation

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    updated over 17 years ago by NewYorkSteve

    1 replies • 13499 views
  • Discussion

    avoid use of certain cells within a subdesign

    Category: Digital Implementation

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    updated over 17 years ago by archive

    1 replies • 13660 views
  • Discussion

    how could FE extract coupled C when doing timeDesign?

    Category: Digital Implementation

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    updated over 17 years ago by archive

    3 replies • 13918 views
  • Discussion

    Regarding sample dofile for in lec verify mode

    Category: Digital Implementation

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    updated over 17 years ago by admin

    1 replies • 13816 views
  • Discussion

    How to get area results in Micron

    Category: Digital Implementation

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    updated over 17 years ago by admin

    3 replies • 14050 views
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