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Digital Implementation

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  • Discussion

    Does reset requires a tree structure like clock?

    Category: Digital Implementation

    By gops

    •

    updated over 16 years ago by Kari

    3 replies • 17340 views
  • Discussion

    Filtering of false DRC violations due to routing blockages in enounter.

    Category: Digital Implementation

    By KVBABU

    •

    updated over 16 years ago by BobD

    1 replies • 15068 views
  • Discussion

    Problem in using v2lvs to convert verilog netlist into spice netlist

    Category: Digital Implementation

    By huybforever

    •

    updated over 16 years ago by rh0dium

    2 replies • 21909 views
  • Discussion

    Is it possible to write out a wireload model from encounter?

    Category: Digital Implementation

    By gops

    •

    updated over 16 years ago by gops

    3 replies • 15285 views
  • Discussion

    Command-line method to draw a ruler on the GUI?

    Category: Digital Implementation

    By jgentry

    •

    updated over 16 years ago by BobD

    1 replies • 14663 views
  • Discussion

    ELC: liberty file output capacitance index different from simulation

    Category: Digital Implementation

    By Brian Harrison

    •

    updated over 16 years ago by Brian Harrison

    2 replies • 15822 views
  • Discussion

    about bufferTreeSynthesis ??

    Category: Digital Implementation

    By icmaple

    •

    updated over 16 years ago by BobD

    1 replies • 14983 views
  • Discussion

    Filler cells placed outside EndCap

    Category: Digital Implementation

    By stevemc

    •

    updated over 16 years ago by BobD

    10 replies • 21165 views
  • Discussion

    listing all the sinks of a clock

    Category: Digital Implementation

    By spach

    •

    updated over 16 years ago by BobD

    3 replies • 18625 views
  • Discussion

    about mechanism of CTS ??

    Category: Digital Implementation

    By icmaple

    •

    updated over 16 years ago by BobD

    1 replies • 14686 views
  • Discussion

    boolean cell description format

    Category: Digital Implementation

    By mbhealy

    •

    updated over 16 years ago by mbhealy

    2 replies • 14860 views
  • Discussion

    ELC simulation fails but without any error message

    Category: Digital Implementation

    By Nathen

    •

    updated over 16 years ago by archive

    1 replies • 14470 views
  • Discussion

    GCELL in def

    Category: Digital Implementation

    By afefafef

    •

    updated over 16 years ago by BobD

    1 replies • 17140 views
  • Discussion

    help ! about CTS insertion delay

    Category: Digital Implementation

    By icmaple

    •

    updated over 16 years ago by BobD

    3 replies • 17028 views
  • Discussion

    definition of reqular pin & special pin.

    Category: Digital Implementation

    By afefafef

    •

    updated over 16 years ago by BobD

    1 replies • 771 views
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