Digital Implementation

Latest Posts

Discussion

Synthsis of VHDL-2008 on RC

Category: Digital Implementation

By shahein
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updated over 13 years ago by grasshopper

1 replies • 15482 views
Discussion

Can Encounter generate the netlist file for hspice simulation from its layout?

Category: Digital Implementation

By zhengyudennis
•
started over 13 years ago

0 replies • 14349 views
Discussion

How to highlight a given list of ports in GUI (First Encounter)

Category: Digital Implementation

By Anuragjn
•
updated over 13 years ago by Anuragjn

2 replies • 18489 views
Discussion

Error on starting Abstract Generator for generating LEF

Category: Digital Implementation

By bjbit
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started over 13 years ago

0 replies • 14638 views
Discussion

How to put Region/Fence out of core boundary?

Category: Digital Implementation

By archive
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updated over 13 years ago by Diegofer

3 replies • 4212 views
Discussion

Not able to select the objects through pointers

Category: Digital Implementation

By smachha
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updated over 13 years ago by smachha

2 replies • 15012 views
Discussion

to overcome timing slack UNCUSTRAINED for combinational circuit in synthesis report

Category: Digital Implementation

By pavanomkar
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updated over 13 years ago by grasshopper

1 replies • 15626 views
Discussion

license issues

Category: Digital Implementation

By BraveHeart
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started over 13 years ago

0 replies • 14346 views
Discussion

TIE-HI and TIE_LO cells

Category: Digital Implementation

By vedamrit
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updated over 13 years ago by Ganga111AtFPS

8 replies • 20960 views
Discussion

Regarding warnings while loading lef file....

Category: Digital Implementation

By Ganga111AtFPS
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updated over 13 years ago by Ganga111AtFPS

2 replies • 14862 views
Discussion

Regarding clock spec file

Category: Digital Implementation

By Ganga111AtFPS
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updated over 13 years ago by Ganga111AtFPS

7 replies • 18483 views
Discussion

Regarding spare cells

Category: Digital Implementation

By Ganga111AtFPS
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updated over 13 years ago by Scrivner

2 replies • 17173 views
Discussion

CTS

Category: Digital Implementation

By ssachin89
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updated over 13 years ago by ssachin89

2 replies • 14749 views
Discussion

Regarding virtual clock warning while loading Timing constraints

Category: Digital Implementation

By Ganga111AtFPS
•
started over 13 years ago

0 replies • 14714 views
Discussion

Regarding dont_touch and dont_use_cell

Category: Digital Implementation

By Ganga111AtFPS
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updated over 13 years ago by fitz

1 replies • 15985 views

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