Functional Verification

Latest Posts

Discussion

Is there a way to adapt vRfine file after RTL source file updated and line number changed

Category: Functional Verification

By yxpe
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updated over 7 years ago by yxpe

2 replies • 16162 views
Discussion

Xcelium DPI

Category: Functional Verification

By SuperUVM
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updated over 7 years ago by SuperUVM

3 replies • 23675 views
Discussion

Collect only Covergroups

Category: Functional Verification

By ArielT
•
started over 7 years ago

0 replies • 14722 views
Discussion

Cadence iLS course manual refers to non-existent 'training' for learning how to use tool features

Category: Functional Verification

By anuraagkn
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started over 7 years ago

0 replies • 1687 views
Discussion

Verifier Access to SV Variable in Testbench

Category: Functional Verification

By wchren
•
started over 7 years ago

0 replies • 14360 views
Discussion

How to manually flush display message buffer to console?

Category: Functional Verification

By bdel
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updated over 7 years ago by StephenH

4 replies • 20848 views
Discussion

UVM RAL

Category: Functional Verification

By SuperUVM
•
started over 7 years ago

0 replies • 15615 views
Discussion

Show all drivers for a particular signal at a particular time in ncim

Category: Functional Verification

By pyohayo
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started over 7 years ago

0 replies • 14412 views
Discussion

Force X in gate level simulation

Category: Functional Verification

By POUCO
•
updated over 7 years ago by POUCO

4 replies • 18948 views
Discussion

Is ncsim (version 12.10-s19) fully compatible with VHDL2008

Category: Functional Verification

By pyohayo
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updated over 7 years ago by StephenH

7 replies • 20035 views
Discussion

Issues in simulation without -uvmnoautocompile with uvm 1.2

Category: Functional Verification

By shrac123
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updated over 7 years ago by StephenH

1 replies • 3698 views
Discussion

Merging data base with two RTL changes

Category: Functional Verification

By sgaikwad
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updated over 7 years ago by StephenH

1 replies • 15427 views
Discussion

Creating transition coverage bins using a queue or dynamically

Category: Functional Verification

By Sparsh Gupta
•
started over 7 years ago

0 replies • 16075 views
Discussion

How to export searched signal list using simvision design search to a text file?

Category: Functional Verification

By Raveen
•
updated over 7 years ago by muffi

3 replies • 22354 views
Discussion

Support VHDL2008 in ncsim

Category: Functional Verification

By pyohayo
•
updated over 7 years ago by pyohayo

2 replies • 16746 views

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