Functional Verification

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Discussion

Capturing glitches in Xcelium

Category: Functional Verification

By kooltoad

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updated over 7 years ago by tpylant

1 replies • 18182 views
Discussion

Promote SVA failure to uvm_error

Category: Functional Verification

By Ezequiel

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started over 7 years ago

0 replies • 14653 views
Discussion

Explicit wire declaration by Virtuoso netlister

Category: Functional Verification

By stanzani

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updated over 7 years ago by alin mocanu

1 replies • 14053 views
Discussion

Efficiency of associative array

Category: Functional Verification

By Jeff000

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updated over 7 years ago by Jeff000

8 replies • 7036 views
Discussion

#ifdef #else #endif inside module instantiation in Verilog

Category: Functional Verification

By aarthymani

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updated over 7 years ago by aarthymani

8 replies • 24281 views
Discussion

Accessing Packed Arrays using Tcl Interface

Category: Functional Verification

By GaneshAMBA

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updated over 7 years ago by GaneshAMBA

2 replies • 15574 views
Discussion

Cadence 17.2 Continuous Refresh problem

Category: Functional Verification

By ajeya

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updated over 7 years ago by StephenH

1 replies • 13839 views
Discussion

How to add hook when exit from simulation?

Category: Functional Verification

By Jeff000

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updated over 7 years ago by StephenH

3 replies • 1481 views
Discussion

C code generated by the veriloga

Category: Functional Verification

By PietroUser

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updated over 7 years ago by StephenH

1 replies • 14007 views
Discussion

How to get system time in SV?

Category: Functional Verification

By Jeff000

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updated over 7 years ago by Jeff000

2 replies • 6331 views
Discussion

iprof_report_dir generated with only a hidden folder

Category: Functional Verification

By Jeff000

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updated over 7 years ago by tpylant

1 replies • 897 views
Discussion

How to increase the signal name font size in Simvision?

Category: Functional Verification

By Jeff000

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updated over 7 years ago by Jeff000

2 replies • 11885 views
Discussion

code_coverage_Error_The_design_unit _somename_has_multiple_top-level_instances_in_the_design_enabled_for_coverage

Category: Functional Verification

By MaheshKumar

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updated over 7 years ago by MaheshKumar

3 replies • 2985 views
Discussion

How to collapse and expand the group in simvision with tcl command?

Category: Functional Verification

By Jeff000

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updated over 7 years ago by Jeff000

2 replies • 3595 views
Discussion

How do I uncheck "Process statement" from sidebar in Simvision?

Category: Functional Verification

By Ncsim User 1

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updated over 7 years ago by StephenH

4 replies • 2972 views

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