Functional Verification

Latest Posts

Discussion

How to make *E to flag as UVM_ERROR

Category: Functional Verification

By ReubenMijares
•
updated over 9 years ago by StephenH

1 replies • 15052 views
Discussion

How to run multiple tests in parallel

Category: Functional Verification

By ReubenMijares
•
updated over 9 years ago by tpylant

3 replies • 16158 views
Discussion

Command that does not consider the coverage of a failing test to the coverage record

Category: Functional Verification

By ReubenMijares
•
updated over 9 years ago by StephenH

1 replies • 13856 views
Discussion

Post place-and-route SDF back-annotation fails when using Verilog multi-dimension array ports and internal nets

Category: Functional Verification

By Pacher Luca
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updated over 9 years ago by Pacher Luca

1 replies • 14699 views
Discussion

Iterator Index Query is having a compile error

Category: Functional Verification

By ReubenMijares
•
updated over 9 years ago by ReubenMijares

2 replies • 13489 views
Discussion

ADDRESS Mapping issue in RAL in UVM

Category: Functional Verification

By mahee424
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updated over 9 years ago by mahee424

1 replies • 16228 views
Discussion

HAL: turn on a rule in the design_info file

Category: Functional Verification

By maraninchijp
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started over 9 years ago

0 replies • 13456 views
Discussion

Simvision plugin problem

Category: Functional Verification

By vinay1
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updated over 9 years ago by vinay1

1 replies • 13601 views
Discussion

Gate level simulation flow with cadence

Category: Functional Verification

By sidharth1990
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updated over 9 years ago by ReubenMijares

1 replies • 13761 views
Discussion

Covered in Formal

Category: Functional Verification

By sraghapx
•
started over 9 years ago

0 replies • 12750 views
Discussion

How to run a regression for multiple testcases with only a single compile using NCsim?

Category: Functional Verification

By ReubenMijares
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updated over 9 years ago by cmarqu

3 replies • 17146 views
Discussion

licqueue is not working

Category: Functional Verification

By ReubenMijares
•
updated over 9 years ago by ReubenMijares

3 replies • 17684 views
Discussion

Jasper connectivity check

Category: Functional Verification

By sraghapx
•
updated over 9 years ago by sraghapx

7 replies • 24921 views
Discussion

Tutorial on NCsim

Category: Functional Verification

By ReubenMijares
•
updated over 9 years ago by StephenH

5 replies • 33911 views
Discussion

forcing signal to hierarchical connection in SystemVerilog when in interactive mode

Category: Functional Verification

By Almendrico
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updated over 9 years ago by Almendrico

4 replies • 18375 views

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