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Functional Verification

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  • Discussion

    What is the meaning of -mess?

    Category: Functional Verification

    By seabeam

    •

    updated over 11 years ago by StephenH

    1 replies • 1405 views
  • Discussion

    Nclaunch becomes drop-dead halt

    Category: Functional Verification

    By ctqiang

    •

    started over 11 years ago

    0 replies • 14815 views
  • Discussion

    Gate Level Sim - SDF annotation debug

    Category: Functional Verification

    By andymont

    •

    updated over 11 years ago by diyar

    2 replies • 9061 views
  • Discussion

    Assertion detect *WORNG* fell of line due to gated clock

    Category: Functional Verification

    By Elnatan

    •

    started over 11 years ago

    0 replies • 14282 views
  • Discussion

    changing the name of waves.trn file

    Category: Functional Verification

    By mkamal

    •

    updated over 11 years ago by andymont

    1 replies • 17225 views
  • Discussion

    Exclude signal in IMC in command line

    Category: Functional Verification

    By Julien Gic

    •

    started over 12 years ago

    0 replies • 16880 views
  • Discussion

    ncelab: *W,MXWARN: Reached maximum warning limit for 'CUVWSP'(1000)

    Category: Functional Verification

    By sidharth1990

    •

    updated over 12 years ago by muffi

    1 replies • 7129 views
  • Discussion

    ncsim: *E,IMPDLL: Unable to load the implicit shared object

    Category: Functional Verification

    By sidharth1990

    •

    updated over 12 years ago by sidharth1990

    2 replies • 3704 views
  • Discussion

    One hot assertion in RTL

    Category: Functional Verification

    By abhishektheone

    •

    started over 12 years ago

    0 replies • 14927 views
  • Discussion

    ncsim: *E,IMPDLL: Unable to load the implicit shared object.

    Category: Functional Verification

    By simonwang

    •

    updated over 12 years ago by sidharth1990

    1 replies • 1933 views
  • Discussion

    Error while invoking Cadence IC615 virtuoso

    Category: Functional Verification

    By Darshak

    •

    updated over 12 years ago by Aoyon

    1 replies • 15083 views
  • Discussion

    How to implement soft reset or functional level reset in vr_ad register model?

    Category: Functional Verification

    By subhash611

    •

    updated over 12 years ago by subhash611

    2 replies • 16887 views
  • Discussion

    Simulating basic Log Amplifier and Antilog Amplifier using diode as well as transistor

    Category: Functional Verification

    By Pavan Garate

    •

    updated over 12 years ago by Pavan Garate

    2 replies • 16146 views
  • Discussion

    Filtering UVM info messages

    Category: Functional Verification

    By vitok

    •

    started over 12 years ago

    0 replies • 14788 views
  • Discussion

    coverage on e Temporal checks

    Category: Functional Verification

    By jaichandra

    •

    updated over 12 years ago by jaichandra

    4 replies • 17006 views
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