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Functional Verification

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  • Discussion

    coverage on e Temporal checks

    Category: Functional Verification

    By jaichandra

    •

    updated over 12 years ago by jaichandra

    4 replies • 17108 views
  • Discussion

    ncsim: *F,INTERR: INTERNAL EXCEPTION

    Category: Functional Verification

    By hfshi

    •

    started over 12 years ago

    0 replies • 3561 views
  • Discussion

    Z state check inside SV

    Category: Functional Verification

    By sanketshah

    •

    started over 12 years ago

    0 replies • 14290 views
  • Discussion

    Setting time resolution using irun

    Category: Functional Verification

    By itsonlyme

    •

    updated over 12 years ago by itsonlyme

    1 replies • 17288 views
  • Discussion

    Uninitialized Clock Gate Cells

    Category: Functional Verification

    By Bart Yount

    •

    started over 12 years ago

    0 replies • 15385 views
  • Discussion

    case () inside gives errors with ncvlog

    Category: Functional Verification

    By mkamal

    •

    updated over 12 years ago by Shalom B

    2 replies • 22100 views
  • Discussion

    coverage option weight

    Category: Functional Verification

    By Umar Farooq

    •

    updated over 12 years ago by Aurelian Amiq

    1 replies • 24276 views
  • Discussion

    Mapping Libraries

    Category: Functional Verification

    By Swimteam

    •

    started over 12 years ago

    0 replies • 15379 views
  • Discussion

    Error : Overflow, divider cannot be zero

    Category: Functional Verification

    By bharathwajan

    •

    updated over 12 years ago by Nagamohan

    1 replies • 15485 views
  • Discussion

    Hierarchical Coverage

    Category: Functional Verification

    By Umar Farooq

    •

    started over 12 years ago

    0 replies • 14486 views
  • Discussion

    Where can I get the equivalent circuit of device model?

    Category: Functional Verification

    By youngdd

    •

    started over 12 years ago

    0 replies • 14505 views
  • Discussion

    Square Wave as input signal

    Category: Functional Verification

    By Pavan Garate

    •

    updated over 12 years ago by oldmouldy

    1 replies • 24275 views
  • Discussion

    vManager Failed: Unexpected error ( Out of memory )

    Category: Functional Verification

    By JennyYang

    •

    updated over 12 years ago by JennyYang

    4 replies • 19958 views
  • Discussion

    INCISIV132/122 does not support some systemverilog 2012 coverage coding

    Category: Functional Verification

    By JennyYang

    •

    updated over 12 years ago by StephenH

    2 replies • 1421 views
  • Discussion

    Does irun 12.20 support multi-core simulation and how to do so

    Category: Functional Verification

    By JennyYang

    •

    updated over 12 years ago by JennyYang

    4 replies • 19097 views
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